S

Shivakant Kushwaha

CTO

Varanasi, Uttar Pradesh, India5 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in designing verification IP for advanced emulation platforms.
  • Strong educational background from IIT BHU with high academic performance.
  • Proven experience in technical roles at leading EDA companies.
Stackforce AI infers this person is a specialist in Electronic Design Automation (EDA) with a focus on verification technologies.

Contact

Skills

Core Skills

Verification Ip Design

Other Skills

VerilogSystemVerilogMicrosoft OfficeMicrosoft ExcelMicrosoft PowerPointMicrosoft WordEnglishMakefile

Experience

5 yrs 10 mos
Total Experience
2 yrs 11 mos
Average Tenure
4 yrs 4 mos
Current Experience

Siemens eda (siemens digital industries software)

2 roles

Lead Member of Technical Staff

Promoted

Jan 2024Present · 2 yrs 4 mos

Senior Member of Technical Staff

Jan 2022Present · 4 yrs 4 mos

  • Working with Mentor Emulation Division as a Research and Development Engineer.
  • Responsible for design of accelerated and synthesizable verification IP for Veloce Emulator Platform.
VerilogSystemVerilogVerification IP Design

Mentor graphics

2 roles

Member Of Technical Staff

Jul 2020Jan 2022 · 1 yr 6 mos · Noida, Uttar Pradesh, India

Intern at Mentor Graphics

May 2019Jul 2019 · 2 mos · Noida Area, India

Education

Indian Institute of Technology (Banaras Hindu University), Varanasi

Bachelor of Technology - B.Tech — Electronics Engineering

Jan 2016Jan 2020

Sarswati Shishu Mandir Senior Secondary School ,Gorakphur

Intermediate

Jan 2013Jan 2015

Saraswati Shishu Mandir Senior Secondary School , Gorakhpur

10th

Jan 2011Jan 2013

Stackforce found 2 more professionals with Verification Ip Design

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