Neelesh Kumar Patel — Software Engineer
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in VLSI and EDA tools.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 8 mos
Skills
- Static Timing Analysis
- Physical Design
- Genus
- Tempus
Career Highlights
- Senior Silicon Design Engineer at Intel Corporation
- Expert in Static Timing Analysis and Physical Design
- Extensive experience with EDA tools and methodologies
Work Experience
Intel Corporation
Senior Silicon Design Engineer (4 mos)
Cadence Design Systems
Principal Solutions Engineer (2 yrs 6 mos)
Lead Solutions Engineer (2 yrs 11 mos)
Senior Solutions Engineer (1 yr 11 mos)
Education
Master of Technology - MTech at Indian Institute of Technology, Madras
Bachelor of Engineering - BE at Shri G S Institute of Technology & Science
AISSCE at Jawahar Navodaya Vidyalaya - JNV
AISSE at Jawahar Navodaya Vidyalaya - JNV
