Balasubramanian R — Software Engineer

DFT-LINT using SPYGLASS Scan insertion and stitching using DFT COMPILER (DFTC), Device level & Block level ATPG, ATPG in COMPRESSION and NO-COMPRESSION modes, Stuck at and transition faults (using Encounter test , Fastscan ATPG Tools) , Coverage analysis, MBIST VERIFICATION, Boundary scan verification (IEEE 1149.1 , IEEE 1149.6), IDDQ , GLS both NO-TIMING (0-delay) and TIMING (SDF) (NCSIM , VCS Tools), Simulation mismatch debug (Simvision, DVE for waveform viewing) , Experience in post silicon debug , ATPG MODEL generation using DESIGN COMPILER (DC), Good knowledge in STA , Basic knowledge in logic design (verilog) , Basic knowledge in scripting, Experience working with MAKEFILE,

Stackforce AI infers this person is a DFT and VLSI expert in the semiconductor industry.

Location: Bengaluru, Karnataka, India

Experience: 15 yrs 7 mos