Raghucharan Boddupalli

Director of Engineering

Bangalore, Karnataka, India25 yrs 2 mos experience

Key Highlights

  • Over 25 years of experience in network architecture.
  • Expert in Ethernet switches and routers design.
  • Led initiatives in SmartNIC architecture for high-speed networks.
Stackforce AI infers this person is a Networking Architect with extensive experience in high-speed data processing and network infrastructure.

Contact

LinkedIn

Skills

Core Skills

Scale Up And Scale Out Ip ArchitectureSmart Nic ArchitecturePacket Processing PipelineBuffer Management Architecture

Other Skills

MACsecIPsecTSNASIC designEthernetsmartNICNetwork ProcessorsSystem ArchitecturePCIEEthernet switchesCXL

About

Over 25+ Years of industry experience in architecting, designing Ethernet switches, routers (specifically traffic manager and packet processing architecture and design). Involved in definition of SmartNIC architectures for ASIC/FPGA for 400GE/800GE. Keywords : Scale up, scale out architecture, Ethernet/IP packet processing and data path acceleration, queue management, scheduling, resource management and flow control, MACSEC, IPSEC, PTP, TSN, PCIE/CXL logical physical layer architecture and SoC architecture

Experience

25 yrs 2 mos
Total Experience
4 yrs 2 mos
Average Tenure
2 mos
Current Experience

Mediatek

Director & Principal Architect, DCAI

Mar 2026 – Present · 2 mos · Bengaluru · On-site

  • definition of scale up and scale out solutions based on ULN and UAL specifications.
Scale up and scale out IP architecture

Cisco

Principal Engineer

Dec 2024 – Mar 2026 · 1 yr 3 mos · Bengaluru · On-site

  • Worked on smart NIC architecture and Cisco silicon one switch architecture. involved and owned up definition of packet processing pipeline for 800G RDMA enabled smart NIC and line side, buffer management architecture for a 51.2Tbps switch.
Smart NIC architecturePacket processing pipelineBuffer management architecture

Google

Silicon Design Lead

Feb 2024 – Nov 2024 · 9 mos · Bengaluru · On-site

Intel corporation

2 roles

Principal Engineer

Mar 2022 – Feb 2024 · 1 yr 11 mos

Technical lead

Jan 2019 – Feb 2024 · 5 yrs 1 mo

Cisco

Technical lead

Feb 2006 – Jan 2019 · 12 yrs 11 mos · Bangalore

Celstream technologies

Asic Design engineer

Jan 2003 – Jan 2006 · 3 yrs

  • Worked as a ASIC design engineer and catered to Thomson multimedia (Belgium)

Indian institue of science

project assistant

Jan 2001 – Jan 2003 · 2 yrs

  • Worked in SERC (CADL) as a project assistant.

Education

B. M. S. College of Engineering

MTech — VLSI design

Jan 2005 – Jan 2008

Bangalore Institute of technology

BE — Telecommunication Engg

Jan 1996 – Jan 2000

Visvesvaraya Technological University

Master of Technology - MTech — VLSI design