Subhankar Sarkar

Software Engineer

Balurghat, West Bengal, India3 yrs 4 mos experience

Key Highlights

  • Expert in ASIC Physical Design and Implementation.
  • Proficient in advanced semiconductor technologies.
  • Strong background in static timing analysis and verification.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in ASIC and Physical Design.

Contact

LinkedIn

Skills

Core Skills

Asic DesignPhysical Design

Other Skills

16nm technology4nm technologyfull physical implementationtiming closureTCLEDAStatic Timing AnalysisPhysics DesignVI EditorUnixLogic Equivalence Check(LEC)Perl ScriptingTcl-TkTclshPnR

Experience

3 yrs 4 mos
Total Experience
2 yrs 9 mos
Average Tenure
6 mos
Current Experience

Qualcomm

Engineer

Dec 2025 – Present · 6 mos

  • Starter working on Qualcomm as a Physican Design Engineer.

Alphawave semi

4 roles

Engineer II - Asic Design (PD)

Promoted

Apr 2025 – Dec 2025 · 8 mos

  • I worked as an Asic Physical Design Engineer. I worked on 16nm and 4nm technology and did a full physical implementation and timing closure of various blocks and subsystems.
16nm technology4nm technologyfull physical implementationtiming closureASIC DesignPhysical Design

Engineer I - Asic Design(PD)

Promoted

May 2024 – Apr 2025 · 11 mos

Engineer - ASIC Design (PD)

Feb 2023 – May 2024 · 1 yr 3 mos

TCLEDAStatic Timing AnalysisPhysics DesignVI EditorUnix+4

Intern- Asic Design

Aug 2022 – Feb 2023 · 6 mos

Tcl-TkTclshPnRRTL SynthesisLinuxStatic Timing Analysis+2

Education

University Institute of Technology, The University of Burdwan

Bachelor of Engineering - BE — Electronics and Communications Engineering

Jan 2018 – Jan 2022

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