Gururajachar R — Software Engineer

I have 5+ years of experience as Design Verification Engineer, worked with leading companies in industry. Got an opportunity to lead team of 3-4 members in one of project(Sub-Lead). I have hands of experience on IP, SoC verification, Formal Verification, Assertions, Coverage Closure, also got exposure to GLS and DFX work. Have good knowledge on languages like Verilog, SV and C; Verification methodology like UVM, Saola, also Assertion based verification. Tools used : Xcelium, VCS, Simvision, JasperGold, Verdi, IMC, vmanager. Have worked and having good knowledge on protocols like AXI, AHB, APB, have knowledge on PCIe, DDR4 protocols.

Stackforce AI infers this person is a Design Verification Engineer with expertise in semiconductor and integrated circuit industries.

Location: Bengaluru, Karnataka, India

Experience: 8 yrs 3 mos