Rohit Kamat

Associate Partner

Bengaluru, Karnataka, India13 yrs 1 mo experience

Highly Stable

Key Highlights

Over 12 years of experience in analog and mixed signal design.
Expertise in Cadence Virtuoso across multiple technology nodes.
Proven track record in designing complex semiconductor layouts.

Stackforce AI infers this person is a Semiconductor Design Expert with extensive experience in Analog and RF layout engineering.

Contact

Skills

Core Skills

Analog LayoutMixed SignalRf Layout

Other Skills

Analog & Mixed signal layout EngineerAnalog/Mixed & RF Layout EngineerCadence VirtuosoPerlAnalog Circuit DesignVery-Large-Scale Integration (VLSI)SemiconductorsRadio Frequency (RF)System on a Chip (SoC)Integrated Circuits (IC)Integrated Circuit DesignElectronics

About

PROFESSIONAL EXPERIENCE:  12+ years experience in Analog ,Mixed signal & RF layouts design.  Hands on experience in Cadence Virtuoso 3nm,4nm,5nm,7nm,8nm,14nm,28nm,45nm, 65nm.  Layout design for ADC,DAC,PLL,LDO,IFA, Marconi IO,SENSOR(Row & Coloumn) circuits.Frequency counters,IVR,Test chip Modules, bias circuits,etc

Experience

13 yrs 1 mo

Total Experience

2 yrs 4 mos

Average Tenure

1 yr 2 mos

Current Experience

Samsung semiconductor

Associate Director

Apr 2025 – Present · 1 yr 2 mos · Bangalore Urban, Karnataka, India

Samsung r&d institute india - bangalore private limited

Senior Staff Engineer

Apr 2021 – Mar 2025 · 3 yrs 11 mos · Bangalore · On-site

Samsung semiconductor

Staff Engineer

Jan 2019 – Mar 2021 · 2 yrs 2 mos

Sankalp semiconductor

Senior Design Engineer

Aug 2017 – Jan 2019 · 1 yr 5 mos · Hubli Area, India

Altran

Senior Engineer

Jul 2015 – Aug 2017 · 2 yrs 1 mo · Hsinchu County/City, Taiwan

Analog & Mixed signal layout Engineer.

Analog & Mixed signal layout EngineerAnalog LayoutMixed Signal

Karnataka microelectronic design centre

Member of Technical Staff

Jan 2013 – May 2015 · 2 yrs 4 mos · Manipal

 2.5 year experience in KarMic Design Center as Analog/Mixed & RF Layout Engineer
 Hands on experience in Cadence Virtuoso 45nm, 180 nm & 350nm technologies.
 Layout of ADC blocks such amplifiers,high speed comparator,IBIAS.
 Layout of Intermediate frequency amplifier.
 Layout of 10GHz frequency counter.
 Layout of Low dropout regulators(LDO).
 Layout of Bandgap reference.
 Layout of Sync bias and LNA bias.
 3 months training in KarMic Training & Research Center.
 Undergone training from Dr.S.S.Mahantshetti for 3months in Analog and Digital Domain