S

sampath kumar polishetty

Software Engineer

Bengaluru, Karnataka, India14 yrs 4 mos experience
Highly Stable

Key Highlights

  • Over 12 years in ASIC functional verification.
  • Expertise in UVM and System Verilog for test bench development.
  • Led verification for multiple high-profile semiconductor projects.
Stackforce AI infers this person is a Semiconductor Verification Engineer with extensive experience in ASIC and SoC verification.

Contact

Skills

Core Skills

Functional VerificationVerification Lead

Other Skills

Team LeadershipTeam BuildingUFSSDCCQSPIQPICQ2SPICC++VerilogSystem VerilogSoC Verification (gatesim)Perl ScriptUVM MethodologyVLSI

About

12 plus years of experience in ASIC functional verification both at IP and SOC.Hands on Verification on Ethernet switch,filters(xl's and gyros), sensors ,Spi,sdio,emmc,sdcc controller ,SD card ,I3c,ufs controller,spmi ,qpic,qspi,q2spi Bus protocols axi,ahb. Experience in developing test benches in UVM and system verilog from scratch and and outlining test , coverage plans and gate sim.

Experience

14 yrs 4 mos
Total Experience
4 yrs 1 mo
Average Tenure
2 yrs 1 mo
Current Experience

Microsoft

DDR verification engineer

May 2024Present · 2 yrs 1 mo · Bengaluru, Karnataka, India · On-site

Qualcomm

STORAGE LEAD

Apr 2018Apr 2024 · 6 yrs · Bengaluru, Karnataka, India · On-site

  • Verification lead for UFS and SDCC ,QSPI,QPIC ,Q2SPI controller
Team LeadershipTeam BuildingFunctional VerificationVerification Lead

Analog devices

Design Verification Engineer

Jul 2015Apr 2018 · 2 yrs 9 mos · banglore

Soctronics

Logic Design Engineer

Jan 2012Jul 2015 · 3 yrs 6 mos · On-site

Education

jntu

Bachelor's degree — ECE

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