N

Nitesh jha.

Software Engineer

Bengaluru, Karnataka, India12 yrs 5 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 6 years of experience in RTL Design.
  • Expertise in ASIC design flow.
  • Currently an Associate Staff Engineer at Samsung.
Stackforce AI infers this person is a skilled ASIC and RTL Design engineer with extensive experience in semiconductor design.

Contact

LinkedIn

Skills

Core Skills

Rtl DesignAsic

Other Skills

VerilogVHDLModelSimCMOSXilinxSystemVerilogIntegrated Circuit DesignCStatic Timing AnalysisSoCCDCDigital Circuit DesignI2CAMBA AHB

About

I am working on RTL Design with 6 year of Experience in ASIC design flow .

Experience

12 yrs 5 mos
Total Experience
3 yrs 1 mo
Average Tenure
7 yrs
Current Experience

Samsung foundry

Associate staff engineer

Jun 2019 – Present · 7 yrs · Karnataka, India

VerilogASICVHDLModelSimCMOSRTL Design+10

Qualcomm

RTL Design Engineer

Feb 2017 – Jun 2019 · 2 yrs 4 mos · Bengaluru, Karnataka, India

Sunrise instruments pvt. ltd.

RTL Design Engineer

Jul 2012 – Mar 2015 · 2 yrs 8 mos · PUNE

Cdac mumbai

Trainee

Feb 2012 – Jul 2012 · 5 mos · Mumbai Metropolitan Region

Education

University of Mumbai

Bachelor of Engineering (BEng) — Electronics Engineering

Jan 2008 – Jan 2011

Terna polytehnic

Diploma in Electronics — Electronics

Jan 2004 – Jan 2008

CDAC -Acts

PG Diploma — VLSI

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