Joginder Singh — Software Engineer
C-DOT (Govt. Of India) (July,1999 to Dec,2006) NXP India Pvt Ltd - Since Dec, 2006 Joined as Lab Manager, presently working as Sr. Analog Design Engineer Lead.
Stackforce AI infers this person is a Semiconductor Validation Engineer with extensive lab management experience.
Location: Bengaluru, Karnataka, India
Experience: 26 yrs 6 mos
Skills
- Validation
- Lab Management
- Lab Operations
- Analog Characterization
Career Highlights
- Led validation for PCIe Gen6 and CXL 3.0 interfaces.
- Managed high-end validation lab operations.
- Expert in analog characterization for USB IP.
Work Experience
Arm
Staff Validation Engineer (1 yr 9 mos)
Qualcomm
Staff Engineer (5 yrs 5 mos)
NXP Semiconductors
Sr. Design Engineer (8 yrs 9 mos)
Sr. Design Engineer Lead (18 yrs 10 mos)
Freescale Semiconductor
Lab Manager (10 yrs)
C-DOT Centre for Development of Telematics
Research Associate (7 yrs)
Education
Master's degree at Manipal Academy of Higher Education
B-Tech at Rajasthan Vidyapeeth
Master of Science - MS at Manipal Academy of Higher Education