Subash G M — Product Manager
A Passionate Electronics Engineer- Design and verify the Nano-Circuits to control & store the of electrons. Experienced Design Verification Engineer with a demonstrated history of working in the semiconductors industry. Skilled at : ➳ Front End - RTL Design, ASIC/SOC, IP, Sub-System Verification. ➳ RTL Design- Debug and Developing Test Benches. ➳ Formal verification and Coverage closure. Expertise in :- HDLs ➜ Verilog HVLs ➜ System Verilog Methodology ➜ UVM Scripting Language ➜ Python, Makefile, Perl. Programming Language ➜ C EDA Tool ➜ Verdi, VCS, QuestaSim, Aldec Riviera Pro, Xilinx ISE, Vivado, Modelsim. Protocols ➜ LPDDR4, HBM, DFI-PHY. Bus Protocols ➜ AMBA Peripheral IO's ➜ SPI, I2C, SMBUS, GPIO. OS ➜ Linux, Windows Personal qualities : - Good team worker as well as an independent worker. - Adaptable to any kind of environment and can work under pressure. - Good analytical and communication skills.
Stackforce AI infers this person is a Design Verification Engineer in the Semiconductors industry.
Location: Bengaluru, Karnataka, India
Experience: 6 yrs 10 mos
Skills
- Design Verification
Career Highlights
- Expert in Design Verification and RTL Design.
- Proficient in multiple EDA tools and HDLs.
- Strong analytical and communication skills.
Work Experience
STMicroelectronics
Technical Leader- Design Verification Engineer (3 yrs 5 mos)
Broadcom Inc.
Design Verification Engineer (1 yr 5 mos)
Qualcomm
Design Verification Engineer (1 yr 6 mos)
Atria Logic Inc.
Design Verification Engineer (3 yrs 5 mos)
Education
Master of Engineering - MEng at Anna University Chennai
Bachelor of Engineering - BE at Er. Perumal Manimekalai College of Engineering
Higher Secondary Education at Seventh Day Adventist Higher Secondary School
SSLC (10th std) at Seventh Day Adventist Higher Secondary School
