Pooja Pangoria

CTO

Bengaluru, Karnataka, India20 yrs 11 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Director-level experience in software engineering leadership.
Expertise in ASIC and VLSI design methodologies.
Proven track record in semiconductor industry.

Stackforce AI infers this person is a semiconductor engineering leader with extensive experience in ASIC and VLSI technologies.

Contact

Skills

Core Skills

AsicVlsi

Other Skills

VerilogEDASoCICTCLPhysical DesignDebuggingStatic Timing AnalysisSemiconductorsApplication-Specific Integrated Circuits (ASIC)PerlVery-Large-Scale Integration (VLSI)System on a Chip (SoC)

Experience

20 yrs 11 mos

Total Experience

6 yrs 11 mos

Average Tenure

11 yrs 7 mos

Current Experience

Cadence design systems

2 roles

Software Engineering Group Director

Promoted

Jan 2024 – Present · 2 yrs 5 mos

ASICVerilogEDASoCVLSIIC+9

Solutions Architect

Jul 2019 – Apr 2024 · 4 yrs 9 mos

Cadence

Principal Product Engineer

Nov 2014 – Present · 11 yrs 7 mos · Bangalore

Intel

CAD Engineer

Jul 2011 – Nov 2014 · 3 yrs 4 mos · Bangalore

Magma design automation

Manager

Jul 2005 – Jul 2011 · 6 yrs · Banglore

Education

Indian Institute of Technology, Bombay

Master of Technology (M.Tech.) — Micoelectronics

Jan 2000 – Jan 2005

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