Sep 2025 – Oct 2025 · 1 mo · Salem, Tamil Nadu, India

• Type: Career Break
• Title: Family Care
• Start date: September 2025
• End date: October 2025
• Description:
• Took a short career break to support my father during his oncology treatment for a malignant issue affecting his left kidney. During this period, I focused on family responsibilities while staying connected with my professional skill development.

Feb 2024 – Aug 2025 · 1 yr 6 mos · Bangalore Urban, Karnataka, India · On-site

• RFSAC(Radio Frequency System Algorithms& Calibration) Cellular development/debug in Surface Mounting Technology lines of the following tech Tech GSM, WCDMA, LTE, NR for Apple product lineup;
• Responsibilities:
• Cellular WiPAS(Wireless Productisation Automation Software) development/deployment for Apple product lineup;
• RF station issue debug;
• Station SW bug fixes;
• Online station optimization;
• Interface with CM(Client Manufacturing) by communicating DOE requirement and review the results

Feb 2024 – Aug 2025 · 1 yr 6 mos · Bengaluru, Karnataka, India · On-site

Dec 2023 – Jan 2024 · 1 mo · Salem, Tamil Nadu, India

• Type: Career Break
• Title: Family Care
• Start date: December 2023
• End date: January 2024
• Description:
• Took a career break to support my parents during their medical treatments. My father has an 80% locomotor disability due to childhood polio, and I assisted him during his care needs. I also supported my mother through her incisional hernia surgery and her ongoing rheumatoid arthritis treatment.

Jun 2022 – Nov 2023 · 1 yr 5 mos · Bengaluru, Karnataka, India · On-site

• To Work requires, Study and Understanding the following 3GPP specifications like #36.211 #36.212 #36.213 #36.302 related to DL Outer Receiver for 4G Long Term Evolution (LTE) for Bit Rate Processing (BRP) in short note as Performance Throughputs, DCI miss in both DL and UL
• Involved in Design and Implementation of the DL LTE-BRP (Outer Receiver) FW Architecture and Interface with HW ASICs and Inner Receiver, Higher Layers.
• To Understand the characteristics and functionality of the HW CODA specifications and to know it's requirements based on that to decide the LTE BRP FW to efficiently use it for the HW.
• Implementation of the Control Channel BRP ( #PBCH #PDCCH #PHICH #PCFICH) and Data Channel(#PDSCH #PMCH) Bit Rate Processing(BRP) to Analyze, Debug, Bug Fix the issue seen in different testing phases like MTK lab test, Field Test with the real Chips across the Globe, FPGA Stimulated HW Test.
• To Verify the Correctness of the LTE BRP FW to run the INTERNAL Testing, UNIT Testing and Regression Testing of both IT/UT with the Test vectors Generated in Stimulator(Using MATLAB).
• Involved in design and implementation of the Log viewer tools development in the existing framework using C++ Language as per module "LTE BRP" Standard Of Operation, For variation generations of the CHIPSETS of their projects and also CR automation Tasks using Python.
• LV tools Development activities for the LTE BRP FW which is majorly useful to see visual representation of the issues like the DCI miss, Performance Low Throughputs, BLER issues in an effective way to analysis and make a reports and transferred it to the Interface Module or Layers the issue.
• Tools are familiar with Perforce Application for Code IDE, Source Insights, Visual Studio SMART IDE, MTK ELT/NLT tools for logs Analyzer and MAT Perf for Interrupt Service Routine check, Log Viewer(LV) for pictorial representation about the issue present in the Logs in a efficient way.

Jun 2022 – Nov 2023 · 1 yr 5 mos · Bengaluru, Karnataka, India · On-site

Oct 2020 – May 2022 · 1 yr 7 mos · Bangalore Urban, Karnataka, India · On-site

• #Worked on Porting, Integration and implementation of the Code with Optimization into DSP Firmware development using Cadence (Xtense) Processor, Xtense IDE, Xtense tools for the product category like CATM and NB-IoT.
• # For Optimization, Analyzing the Cycle Counts based on this priorities which has been taken more cycle and list out those modules and then started to do the Optimization using Intrinsic function with reference docs, Optimize formula and procedure within the MIPS.
• #For SW Testing using the initial stage of the Unit Test using Module Test framework and then,
• #For Call Box Testing, Online Verification and validation has been done using the Lab equipment's like Amari-soft CMW500, R&S for Online Attach.
• #Using Log analyzer with Trace 32, SPI Logs, UE logs and e-NodeB logs for debugging failed and conformance Test cases
• #Worked on Channels for CATM category like,
• Cell Search Synchronization Procedure like PSS & SSS
• Cell Measurements entity like RSRP, RSRQ and RSSI
• Downlink channels like PBCH, MPDCCH, PDSCH
• Uplink channels like PUSCH.

Oct 2020 – May 2022 · 1 yr 7 mos · Bengaluru, Karnataka, India · On-site

Apr 2019 – Sep 2020 · 1 yr 5 mos · Chennai, Tamil Nadu, India

• Experienced Associate Software Engineer with a demonstrated history of working in the wireless semiconductor sector industry. Strong engineering professional with a Bachelor of engineering (BE) focused in Computer Science & Engineering from Government College of Engineering, Salem.
• Skilled in Embedded C, C++ in various compiler platform.
• Strong experience in software architecture, Data Structure (DS) & Algorithms.
• General knowledge on LTE Modem Integration,Telecommunication, Mobile broadband, Model-based Framework development, LTE Protocol stack development for both eNodeB and UE/modem chip sets.
• Mainly involved in development of LTE Physical Layer of the Cell Search synchronisation procedure for the DSP firmware development and end-end product signoff.
• 3GPP - Specification study, Requirements Capture from 36.201, 36.211, 36.212, Design & Implementation of the LTE Cell Search synchronisation procedure. For that UT/ST testing & integration testing activities doing of the Module level based development.
• Extensive experience in development and testing of software applications.
• Have a knowledge on software development in DSPs processors (ZSP900M & ZSP981M), ZSP stimulator.
• Hands on experience with tools like Zview IDE, Zdebugger, DVE , Mbit platform analyser tools, NVM, AT commands and Vim editors.
• Involved in cross compilation of source code with the Power PC linux and GCC.
• Ability to discuss the various product's technical requirements, design, issues and providing solution to the issues via day to day or weekly discussion.
• Working experience in subversion control SVN.
• Able to work within a team as well as independently.
• Have worked on conformance test case scripting and validation of the LTE Cell Search module in CAT-M & NB-IOT.
• Hands on design & implementation of stimulation frameworks development used to validating and debugging the HW & SW partitioning of the control & data flow path along with the DSP processor.

Jun 2018 – Mar 2019 · 9 mos · Chennai, Tamil Nadu, India