Raghu Kumar Alamuri

AI Researcher

Bengaluru, Karnataka, India21 yrs 5 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in RTL performance analysis for leading tech companies.
Proven track record in SoC and CPU performance verification.
Strong background in 3D graphics and integrated circuit design.

Stackforce AI infers this person is a semiconductor performance analysis expert with a focus on RTL and SoC design.

Contact

Skills

Core Skills

Performance AnalysisRtl DesignPerformance VerificationSoc DesignCpu Performance AnalysisVerificationCpu DesignPerformance BenchmarkingRtl Verification3d Graphics DesignVhdl Design

Other Skills

System SoftwareSoftware Documentation3D graphicsSecurity Architecture DesignFormal VerificationLogic SynthesisVHDLSoCASICVLSIIntegrated Circuit DesignHardware Architecture

About

*** Pre-silicon RTL Performance Analysis ONLY *** * Nextgen TPU performance modelling and analysis (current role) * Google Pixel SoC Performance Analysis * Intel next generation CPU IP performance analysis * ARM on ARM CPU subsystem performance analysis * AMD on graphics subsystem performance analysis

Experience

21 yrs 5 mos

Total Experience

3 yrs

Average Tenure

4 yrs 4 mos

Current Experience

Google

2 roles

ML/TPU Performance Modelling and Analysis

Aug 2024 – Present · 1 yr 10 mos · Bengaluru, Karnataka, India

Performance AnalysisRTL Design

SoC Performance Verification Tech Lead

Jan 2022 – Jul 2024 · 2 yrs 6 mos · Bengaluru, Karnataka, India

Performance VerificationSoC Design

Intel corporation

CPU Performance Verification Tech Lead

Sep 2018 – Jan 2022 · 3 yrs 4 mos · Bengaluru Area, India · On-site

CPU Performance AnalysisVerification

Arm

2 roles

Principal Performance Analysis Engineer

Apr 2017 – Sep 2018 · 1 yr 5 mos

Performance AnalysisCPU Design

Staff Performance Analysis Engineer

Jan 2014 – Mar 2017 · 3 yrs 2 mos

RTL performance and benchmarking of ARM based mobile and enterprise subsystems

Performance BenchmarkingRTL Design

Amd

3 roles

Senior MTS

Jan 2013 – Jan 2014 · 1 yr

Technical Lead for FUSION RTL performance verification activities.

RTL VerificationPerformance Analysis

MTS

Nov 2010 – Dec 2012 · 2 yrs 1 mo

Technical Lead for FUSION RTL performance verification activities.

RTL VerificationPerformance Analysis

Senior Design Engineer

Mar 2009 – Oct 2010 · 1 yr 7 mos

3D Graphics SoC Design Verification.

3D Graphics DesignVerification

Altran technologies

Consultant

May 2008 – Feb 2009 · 9 mos

Worked for NXP Semiconductors on couple of projects. Handled design in VHDL, verification in Specman, TCL based, Spyglass checks and synthesis. The verification environment is made synthesizable to port on FPGAs.
Successfully completed the course from Handshake Technologies on pure Asynchronous designs. The course covers from design till implementation in Haste language.
As a services company proposed couple of verification methodology ideas with leaders in semiconductor business.
Explored and helped Altran in finding new clients to improve business.

VHDL DesignVerification

Conexant systems

Senior Design Engineer

Mar 2006 – Apr 2008 · 2 yrs 1 mo

Worked for two business lines Broadband Media Processing and IPM(Image PC Media).
Handled various front end tasks include design in Verilog, Spyglass, Synthesis, Formal verification, Unit level verification, System level verification, Emulation.
Used verification methodologies like Specman, IFV, Verilog based, Paxis based, C based.
Involved in the development of software drivers, FPGA porting.

VHDL DesignVerification

Texas instruments

Design Engineer

Jul 2004 – Mar 2006 · 1 yr 8 mos

Worked as a design engineer in wireless group.
Handled various tasks include Module level verification, System level verification, RTL Bug fix, Formal verification.
Worked on variuos verification methodologies include Specman, IFV, Assembly language based.

VerificationRTL Design