Sowmya Nagaraj

CEO

Bengaluru, Karnataka, India11 yrs 10 mos experience

Key Highlights

Expert in analog circuit design and validation.
Proficient in automation and tool development.
Strong background in CAD and semiconductor technologies.

Stackforce AI infers this person is a Semiconductor and CAD expert with a focus on automation and circuit design.

Contact

Skills

Core Skills

AutomationDftCircuit DesignValidationCadDatabase ManagementCharacterization

Other Skills

Web automationPythonTool developmentRegistersMemory GenerationDAE supportRTG Flow DevelopmentPerlVerilogPDK LibrariesOpenrail toolMemory CompilerTkinterDatabase AccessPCells

Experience

11 yrs 10 mos

Total Experience

1 yr 5 mos

Average Tenure

Current Experience

• wafer space semiconductor technologies pvt. ltd. (google)

Technical Lead

Sep 2024 – Nov 2024 · 2 mos · India · On-site

Web automation using python

Web automationPythonAutomation

Rakiya information technology solution(cypress semiconductor/inifneon)

Principal Engineer

Sep 2021 – Apr 2024 · 2 yrs 7 mos · Bangalore

Tool development for DFT team which writes the data into corresponding registers.

Tool developmentDFTRegisters

Eteam infoservices pvt. ltd. (intel)

Engineer-Automation III

Dec 2019 – Mar 2020 · 3 mos

1. Memory Generation flow and estimation of run times
2. Support and developmental tasks in DAE group

Memory GenerationDAE supportAutomation

Mirafra software technologies private limited (western digital)

Member Of Technical Staff

Jun 2018 – Jan 2019 · 7 mos

At Sandisk:
RTG Flow Development in Perl:
Pointing DRC markers at the Block level
Enhancement of PVSummary file creation
Updation of 32nm Verilog design from 45nm

RTG Flow DevelopmentPerlVerilogCircuit Design

Altran technologies (intel)

Senior Engineer

Sep 2017 – Mar 2018 · 6 mos · Bangalore

At Intel:
Validation (ERC(EOS), BTS and GOX) of PDK Libraries (Upto 10nm); Development of in-house “Openrail” tool

ValidationPDK LibrariesOpenrail tool

Insemi technology services private limited

Staff CAD Engineer

Jul 2017 – Sep 2017 · 2 mos · Bangalore

Parsing “Memory Compiler" XML and reading it into a GUI using Python and Tkinter

Memory CompilerPythonTkinterCAD

Cognizant

Senior Associate Engineer

Oct 2015 – Mar 2017 · 1 yr 5 mos · Bengaluru Area, India

Development using python for accessing Distributed database/EM(GMDB) and Relational database(GMC)

PythonDatabase AccessDatabase Management

Plx technology

Senior CAD Engineer

Nov 2011 – Feb 2012 · 3 mos · Bangalore

Migration of a few Pcells(Guard ring, Fcap) from 40nm to 28nm; PDK Installation and maintenance; Day to Day CAD Support to the Analog Team

PCellsPDK InstallationCAD SupportCAD

National semiconductor

CAD Engineer

Aug 2008 – Oct 2010 · 2 yrs 2 mos · Bangalore

Implementing Optimization of the analog design using in house tool through different algorithms; Calibre Rule Deck Preparation; Pcell Development; Enhancement of the in house simulation tool(coding Device equations: diode and CMUT) and wrappers; Initiated Smart Grid Project for Energy Estimation of Household appliances; Design rules enhanced for Calibre.

OptimizationCalibre Rule DeckPCell DevelopmentCircuit Design

Magma design automation

Product Engineer

Apr 2007 – May 2008 · 1 yr 1 mo · Bangalore

Preparation of Design & Parasitic Rule Decks; Characterization of Standard Cell Libraries

Design Rule DecksCharacterization

Qualcomm

Design Engineer

Dec 2003 – Mar 2007 · 3 yrs 3 mos · Bangalore

Standard Cell Library Development(Layout and Characterization); Custom Circuit Functional Verification; I/O Library Characterization, Modeling and Verification

Standard Cell LibraryFunctional VerificationCircuit Design