Anirudha Kulkarni — Software Engineer
Specialty : SoC Design, Design For Test Active involvement in RTL to GDS flow and signoff in many tape outs SoC and IP Design and verification Execution and technical management of many projects Domain knowledge : Scan Synthesis, STA, CTS Cross domain knowledge : DVB, 3G, WCDMA, 802.11a, DSP, Digital Communication EDA Tools Experience : Synopsys Tetramax, Design Compiler, and PrimeTime, Cadence NcSim HDL : VHDL, Verilog A little bit hands on with TCL and C Managed and executed projects as a SoC DFT lead for Set Top Box SoC Worked on many SoCs and their variants with successful execution. Some of the products that I worked on were best selling products in Set Top Box Domain Managed and executed IP Design and verification for 3GPP UE design, verification, FPGA synthesis, and FPGA to ASIC conversion
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in SoC and DFT methodologies.
Location: Bengaluru, Karnataka, India
Experience: 31 yrs 4 mos
Skills
- Soc Design
- Dft
- Soc Dft
- Test Verification
- Pattern Debug Support
- Ip Dft Methodology
- Tcl Scripting
- Fpga Synthesis
- Asic Conversion
Career Highlights
- Expert in SoC Design and DFT methodologies.
- Led successful projects in Set Top Box domain.
- Extensive experience in RTL to GDS flow.
Work Experience
Intel Corporation
Component Design Engineer (10 yrs 8 mos)
STMicroelectronics
Senior Staff Engineer (3 yrs 3 mos)
Senior Engineering Specialist (2 yrs 8 mos)
Engineering Specialist (3 yrs)
Senior Design Engineer (2 yrs)
Design Engineer (2 yrs)
DCM Technologies
Team Leader (2 yrs 7 mos)
CG-CoreEl Logic Systems
Design Engineer (2 yrs 7 mos)
DB Electronics
Customer Support Engineer (2 yrs 10 mos)
Education
ME at Birla Institute of Technology and Science, Pilani
BE
Higher Secondary School at Shivaji Science College
at Manibai Gujrati Highschool