Gururajachar R

Software Engineer

Bengaluru, Karnataka, India8 yrs 3 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

5+ years as a Design Verification Engineer.
Led a team of 3-4 members as Sub-Lead.
Expertise in IP and SoC verification methodologies.

Stackforce AI infers this person is a Design Verification Engineer with expertise in semiconductor and integrated circuit industries.

Contact

Skills

Core Skills

Design VerificationSoc VerificationDfxTeam LeadershipFormal VerificationFunctional Verification

Other Skills

InterconnectAMBACPUSaolaGLSIP verificationAssertion Based VerificationDebuggingUniversal Verification Methodology (UVM)VerilogSystemVerilogC (Programming Language)System VerificationSystem on a Chip (SoC)Application-Specific Integrated Circuits (ASIC)

About

I have 5+ years of experience as Design Verification Engineer, worked with leading companies in industry. Got an opportunity to lead team of 3-4 members in one of project(Sub-Lead). I have hands of experience on IP, SoC verification, Formal Verification, Assertions, Coverage Closure, also got exposure to GLS and DFX work. Have good knowledge on languages like Verilog, SV and C; Verification methodology like UVM, Saola, also Assertion based verification. Tools used : Xcelium, VCS, Simvision, JasperGold, Verdi, IMC, vmanager. Have worked and having good knowledge on protocols like AXI, AHB, APB, have knowledge on PCIe, DDR4 protocols.

Experience

8 yrs 3 mos

Total Experience

2 yrs 6 mos

Average Tenure

3 yrs

Current Experience

Arm

Senior Verification Engineer

Jun 2023 – Present · 3 yrs · Bengaluru, Karnataka, India · Hybrid

Nvidia

Verification Engineer

Jan 2022 – May 2023 · 1 yr 4 mos · Bengaluru, Karnataka, India · Remote

Worked as Contractor in NVIDIA. Got an exposure to work on DFX work. Worked on different checkers and debugging.

DFXCPUDesign Verification

Intel corporation

Verification Engineer

Jan 2021 – Dec 2021 · 11 mos · Bengaluru, Karnataka, India · Remote

Worked as Contractor, got opportunity to work as Sub-Lead. Got exposure to work on Saola

SaolaTeam LeadershipDesign Verification

Analog devices

DV engineer

Dec 2018 – Jan 2021 · 2 yrs 1 mo · Bengaluru, Karnataka, India · On-site

Worked as Contingent Worker. Owned and delivered multiple blocks/IPs, also worked on Top/SoC Verification. Got opportunity to work on Formal Verification, Functional Verification, Coverage closure, GLS.

InterconnectGLSFormal VerificationFunctional Verification