Nikita Ranjan — Software Engineer
Experience in STA , constraint delivery , completed two project ,driving partition level timing closure . I have been experience in physical design and skilled with cadence encounter , icc2 by synopys and prime time (methodology tools) and completed two accurate designs by meeting all timings and design rules given during my work with lower node .
Stackforce AI infers this person is a Physical Design Engineer with expertise in semiconductor design and timing analysis.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 11 mos
Skills
- Constraint Delivery
Career Highlights
- Expert in Static Timing Analysis and Physical Design.
- Successfully completed two accurate designs meeting all timings.
- Proficient in Cadence Encounter and ICC2 methodologies.
Work Experience
Qualcomm
Senior Lead Engineer (7 mos)
Senior Engineer (2 yrs 4 mos)
Intel Corporation
SoC Design Engineer (1 yr 2 mos)
INVECAS
Physical Design Engineer (1 yr 4 mos)
Soctronics
Physical Design Engineer (2 yrs)
VEDA IIT
Physical design trainee (7 mos)
Education
Bachelor of Technology - BTech at CV Raman College of Engineering (CVRCE), Bhubaneswar