Poorvaja Sankaran

Product Engineer

Bengaluru, Karnataka, India10 yrs 11 mos experience
Highly Stable

Key Highlights

  • Experienced in RTL Design and Verification.
  • Proficient in USB3.0 and PCIe protocols.
  • Strong background in digital design engineering.
Stackforce AI infers this person is a Digital Design Engineer with expertise in RTL and protocol development.

Contact

LinkedIn

Skills

Core Skills

Rtl DesignVerilogUsb3.0PcieVerification

Other Skills

RTL CodingDebuggingSimvisionSpyglassCC++MatlabMicrosoft OfficePowerPointMicrosoft WordTeamworkRTL developmentGate Level SimulationSynthesize RTL

Experience

10 yrs 11 mos
Total Experience
2 yrs 8 mos
Average Tenure
--
Current Experience

Analog devices

Staff Digital Design Engineer

Mar 2023 – Aug 2025 · 2 yrs 5 mos · Bengaluru, Karnataka, India

VerilogRTL DesignRTL CodingDebuggingUSB3.0PCIe+9

Intel corporation

IP Logic Design Engineer

Aug 2021 – Mar 2023 · 1 yr 7 mos · Bangalore Urban, Karnataka, India

Qualcomm

2 roles

Lead Engineer, Senior

Promoted

Dec 2020 – May 2021 · 5 mos

Senior Design Engineer

Jun 2017 – Nov 2020 · 3 yrs 5 mos

Cadence design systems

2 roles

Design Engineer II

Jul 2015 – Sep 2016 · 1 yr 2 mos · Bangalore

  • Transmitter PMA - USB3.0, PCIe and Display Protocol

Design Engineer I

Jul 2013 – Jun 2015 · 1 yr 11 mos · Bangalore

  • Digital Design - RTL development for serial interfaces (USB3.0 , PCIe ).
  • Verification - Basic IP level verification of the RTL. Gate Level Simulation debug support.
  • Synthesize RTL with RC compiler.
  • Post synthesis report analysis.

Education

Coimbatore Institute of Technology

Bachelor's Degree

Jan 2009 – Jan 2013

Kendriya Vidyalaya No 2,Kalpakkam,

High School — Science Group

Jan 1996 – Jan 2007

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