Pradeep Kaliaperumal

Director of Engineering

Bengaluru, Karnataka, India17 yrs 4 mos experience
Highly Stable

Key Highlights

  • Expert in ASIC and VLSI verification methodologies.
  • Proven leadership in managing verification teams.
  • Extensive experience in SoC and IP verification.
Stackforce AI infers this person is a Semiconductor Verification Expert with strong leadership capabilities.

Contact

LinkedIn

Skills

Other Skills

SystemVerilogFunctional VerificationASICVerilogEDARTL designSoCVLSIFPGANCSimOpen Verification MethodologyModelSimTCLRTL codingStatic Timing Analysis

Experience

17 yrs 4 mos
Total Experience
2 yrs 6 mos
Average Tenure
2 yrs 1 mo
Current Experience

Microsoft

2 roles

Director, Verification and Validation

Promoted

Sep 2025 – Present · 9 mos

Senior SoC and IP Verification Engineer

May 2024 – Present · 2 yrs 1 mo

Intel corporation

2 roles

Engineering Manager

Promoted

Nov 2019 – Jun 2023 · 3 yrs 7 mos

  • Managing a verification team catering the infrastructure needs for the SoC and IP blocks. CoE for Debug for Design, which is very much needed and instrumental for successful products.

Verification Lead

Jun 2019 – Nov 2019 · 5 mos

Ericsson

Senior Consultant - Ericsson

Nov 2016 – Jun 2019 · 2 yrs 7 mos · Bangalore & Lund, Sweden

  • 5G

Nvidia

Sr. ASIC Engineer

Nov 2014 – Sep 2016 · 1 yr 10 mos · Bangalore

Broadcom

Staff Engineer

Apr 2013 – Jul 2014 · 1 yr 3 mos · Bangalore

Xilinx india

Hardware Development Engineer

Feb 2011 – Mar 2013 · 2 yrs 1 mo · Hyderabad Area, India

Hcl technologies

2 roles

Lead Engineer

Jul 2010 – Mar 2011 · 8 mos · Chennai Area, India

Member Technical Staff

Aug 2007 – Jul 2010 · 2 yrs 11 mos · Chennai Area, India

  • ASIC Verification Engineer. SYSTEM VERILOG(HVL)

Education

Government College of Technology, Coimbatore

Jan 2003 – Jan 2007

Stackforce found 100+ more professionals with SystemVerilog & Functional Verification

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