PRATEEK D K

Product Engineer

Bengaluru, Karnataka, India13 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • 3 years of experience in Physical Design.
  • Expert in block level designs for advanced technologies.
  • Strong background in timing closure and reliability issues.
Stackforce AI infers this person is a Physical Design Engineer in the Semiconductor industry.

Contact

Skills

Core Skills

Physical DesignTiming Closure

Other Skills

AMD FlowInnovus Make Flowfloorplanningplacement blockagesoptimizationrouting congestiontiming optimizationSTAOCVMCMMlow power conceptsReliability issuesEMCross talkIR drop

About

Currently having 3 years of experience in Physical Design Successfully implemented block level designs from netlist to GDSII in 7nm, 16nm, 28nm technologies.

Experience

13 yrs 7 mos
Total Experience
3 yrs 4 mos
Average Tenure
5 yrs 11 mos
Current Experience

Signoff semiconductors

Design Engineer 2 - Physical Design Engineer

Jul 2020Present · 5 yrs 11 mos · BANGALORE

Amd

Physical Design Engineer

Jul 2018Jul 2019 · 1 yr · Bengaluru, Karnataka, India

Mediatek

Physical Design Engineer

Dec 2017Jun 2018 · 6 mos · Bengaluru, Karnataka, India

Pozibility technologies pvt ltd

Physical Design Engineer

Apr 2017Jun 2020 · 3 yrs 2 mos · Bengaluru, Karnataka, India

  • Experience with AMD Flow, Innovus Make Flow
  • Successfully implemented block level designs from netlist to GDSII in 7nm, 16nm technologies.
  • Hands on experience and knowledge on floorplanning, placement blockages, optimization, routing congestion, & timing optimization during post CTS & post routing stages.
  • Essential knowledge of STA and ability to interpret timing reports for Setup and Hold analysis.
  • Good understanding of OCV, MCMM concepts.
  • Understanding of low power concepts
  • Responsible for timing closure on various blocks in ECO/MECO cycle
  • Fundamental knowledge of Reliability issues like EM, Cross talk, IR drop and Antenna effect.
  • Performed DRC clean-up, short fixing, debugging LVS issues, fixing EM violations, IR Drops on blocks.
  • Basic scripting skills with TCL
AMD FlowInnovus Make Flowfloorplanningplacement blockagesoptimizationrouting congestion+19

Microsemi corporation

PD Engineer

Apr 2017Nov 2017 · 7 mos

Axa technology services india private limited.

Associate

Aug 2013Feb 2017 · 3 yrs 6 mos · Bengaluru, Karnataka, India

Bharat electronics

TRAINEE

Dec 2011Dec 2012 · 1 yr

  • WAS PART OF A PRODUCTION TEAM.WORKED IN ELECTROSTATIC PROTECTED AREAS(EPA).THE VARIOUS OPERATIONS OR THE FUNCTIONALITY OF THE "PRINTED CIRCUIT BOARD(PCB)" OCCURRING SUCH AS ITS INSULATION,OPERATION SEQUENCE ETC, USED TO BE CHECKED WITH THE HELP OF A DEDICATED ATE.DURING ANY FAILURE OF OPERATIONS/FUNCTIONS OF "PCB" ,I ANALYSED AND USE TO TROUBLESHOOT THE ROOT CAUSE.

Education

SRI KRISHNA INSTITUTE OF TECHNOLOGY,BANGALORE

Bachelor of Engineering (BE) — ELECTRONICS & COMMUNICATION ENGG

Jan 2007Jan 2011

SCPUC,BANGALORE

KARNATAKA STATE PRE UNIVERSITY BOARD — SCIENCE

Jan 2005Jan 2007

HAL PUBLIC SCHOOL,BANGALORE

ALL INDIA SECONDARY SCHOOL EXAMINATION

Jan 2002Jan 2005

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