Rajneesh Jaiswal — Software Engineer
Experienced Hardware Design Engineer with a demonstrated history of designing High speed boards based on FPGAs and DSP processors.Solid experience in schematic entry, schematic review, board bring up, testing and debugging with expertise in tools like OrCAD and Allegro and industry standard protocols and interfaces like IIC, SPI, Ethernet, XAUI,DDR3, NAND,NOR Flash, JTAG etc . Strong engineering professional with a B. Tech focused in Electronics and communication from Cochin University of Science and Technology.
Stackforce AI infers this person is a Hardware Design Engineer specializing in high-speed electronic systems and FPGA design.
Location: Bengaluru, Karnataka, India
Experience: 10 yrs 7 mos
Skills
- Hardware Engineering
- Fpga Design
- Communication
Career Highlights
- Expert in designing high-speed FPGA and DSP boards.
- Strong background in hardware engineering and communication protocols.
- Proficient in industry-standard tools like OrCAD and Allegro.
Work Experience
Qualcomm
Senior Lead Engineer (3 yrs 6 mos)
Senior Engineer (3 yrs 4 mos)
CoreEL Technologies
Sr. Hardware Design Engineer (1 yr 3 mos)
Hardware Design Engineer (2 yrs 6 mos)
Education
Bachelor of Technology - BTech at Cochin University of Science and Technology
