Rakesh Kumar

Software Engineer

Bengaluru, Karnataka, India13 yrs 8 mos experience

Highly Stable

Key Highlights

Expert in Static Timing Analysis for high-frequency designs
Led STA for advanced 5G Modem chip projects
Proficient in Physical Design and RTL implementation

Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in Physical Design and Timing Analysis.

Contact

Skills

Core Skills

Static Timing AnalysisPhysical Design

Other Skills

CPU Design5G Modem DesignRTL DesignSynthesisAPRTiming SignoffCC++MatlabMicrosoft OfficeSQLProgrammingData StructuresJava

About

I want Engineering position that leverages my skills in Physical Design and Static Timing Analysis and gives me enough opportunities for innovation and team work .

Experience

13 yrs 8 mos

Total Experience

5 yrs 3 mos

Average Tenure

3 yrs 1 mo

Current Experience

Google

Deisgn Engineer

May 2023 – Present · 3 yrs 1 mo · Bengaluru, Karnataka, India

Working as a STA Design Engineer for CPU .Worked on closing timing for multiple high frequency CPU partitions .

Static Timing AnalysisCPU Design

Qualcomm

Staff Engineer

Sep 2020 – May 2023 · 2 yrs 8 mos · Noida, Uttar Pradesh, India

STA lead for 5G Modem chips . Worked on 5nm chips and successfully closed timing for multiple 5G Modem full flat designs consisting of 35M and above instance counts and Frequency above 1Ghz

Static Timing Analysis5G Modem DesignPhysical Design

Nxp semiconductors

4 roles

Staff Engineer

Apr 2019 – Aug 2020 · 1 yr 4 mos

Lead Design Engineer

Apr 2017 – Mar 2019 · 1 yr 11 mos

Senior Design Engineer

Promoted

Apr 2015 – Mar 2017 · 1 yr 11 mos

Design Engineer

Jun 2012 – Mar 2015 · 2 yrs 9 mos

Responsible for complete rtl to gds implementation starting from Synthesis and APR to Timing Signoff. Some of the notable works include Physical design of DDR and TOP level sea of gates implementation .
Successes included reducing power of a hierarchical design with optimum implementation of Power gates. Worked on both Cadence and Synopsys tools for Synthesis and PNR.

RTL DesignPhysical DesignSynthesisAPRTiming Signoff