R

Rekha Kashyap

Software Engineer

Bengaluru, Karnataka, India4 yrs 2 mos experience
Most Likely To Switch

Key Highlights

  • Expertise in Physical Low Power Synthesis and Floorplanning.
  • Experience with advanced tech nodes: 2nm, 3nm, and 4nm.
  • Qualified UGC NET 2021.
Stackforce AI infers this person is a VLSI Engineer with expertise in Physical Design and Low Power Synthesis.

Contact

LinkedIn

Skills

Core Skills

Static Timing AnalysisPhysical SynthesisPhysical Design

Other Skills

CLPTiming ClosureTimingASIC Physical DesignICC2Synopsys PrimetimeDesign CompilerSynopsys toolsDigital ElectronicsElectronicsC (Programming Language)Embedded SystemsEmbedded CLabVIEWMATLAB

About

Expertise in Physical Low Power Synthesis(DC,FC,Genus), Floorplanning, Conformal Low Power (CLP) Flow, STA, LEC, Formality and ECO flow. Worked on 2nm, 3nm and 4nm tech nodes. Qualified UGC NET 2021.

Experience

4 yrs 2 mos
Total Experience
2 yrs 1 mo
Average Tenure
2 yrs 1 mo
Current Experience

Qualcomm

Senior Hardware Engineer

May 2024 – Present · 2 yrs 1 mo · Bengaluru, Karnataka, India · On-site

Mediatek

VLSI Engineer

Apr 2022 – May 2024 · 2 yrs 1 mo · Bengaluru, Karnataka, India · On-site

  • Synthesis and STA Engineer
Static Timing AnalysisPhysical Synthesis

Chipedge technologies pvt ltd

ASIC Physical Design Trainee

Sep 2021 – Feb 2022 · 5 mos · Karnataka, India

Physical SynthesisPhysical Design

Webtek labs pvt. ltd.

Summer Internship

Jun 2019 – Jul 2019 · 1 mo · Delhi, India

Education

Jamia Millia Islamia

Master of Science — Electronics

Jan 2018 – Jan 2020

Delhi University

Bachelor of degree — Electronics

Jan 2015 – Jan 2018

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