Sreejith K M

Software Engineer

Bengaluru, Karnataka, India11 yrs 10 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in ASIC physical design and timing analysis.
  • Proficient in multiple programming languages including Python and C++.
  • Strong educational background from IIT Bombay.
Stackforce AI infers this person is a semiconductor design engineer with expertise in ASIC development and physical design.

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Skills

Core Skills

Physical DesignStatic Timing Analysis

Other Skills

C++VerilogPythonMatlabProgrammingMicrosoft OfficeEmbedded SystemsAlgorithmsLinuxVHDL

About

Experienced STA and physical design engineer with a demonstrated history of working in the semiconductor industry. Skilled in ASIC physical Design , Static Timing Analysis, and proficient in verilog, tcl,bash,cshell ,Python, C++ ,perl scripting. Strong engineering professional with a Master of Technology (MTech) focused in Electronic Systems from Indian Institute of Technology, Bombay.

Experience

11 yrs 10 mos
Total Experience
3 yrs 11 mos
Average Tenure
8 yrs 5 mos
Current Experience

Intel tech. india private limited,bangalore

Digital Design Engineer

Jan 2018Present · 8 yrs 5 mos · Bengaluru Area, India

Physical DesignStatic Timing AnalysisC++VerilogPython

Qualcomm inc

Engineer

Jul 2015Jan 2018 · 2 yrs 6 mos · Chennai Area, India

Tejas networks

2 roles

R&D Engineer

Aug 2012Jul 2013 · 11 mos

Research and Development Engineer

Aug 2012Jul 2013 · 11 mos

Education

Indian Institute of Technology, Bombay

Master of Technology (MTech) — Electronic Systems

Jan 2013Jan 2015

NIT Calicut

Bachelor of Technology (BTech) — Electronics and Communication Engineering

Jan 2008Jan 2012

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