Vishal Trivedi — Software Engineer

Tech enthusiast with a Master's in Mathematics and Computing from IIT Kharagpur. I specialize in full-stack development, with deep proficiency in C and C++, and also possess a strong command of hardware description languages including Verilog, System Verilog, and VHDL. My experience in globally diverse teams has enhanced my ability to drive innovation, solve complex problems, and deliver robust technical solutions from the algorithm to the chip level. C | C++ | C++17/20 | SystemVerilog | Verilog | Synthesis | Place and Route | Place & Route | Debugging | Cursor | AI | EDA Software Engineer | Synthesis & Formal Verification R&D | Compiler Design & Logic Optimization | High-Performance Word-Level Synthesis Engine | Developing core engine technologies utilized across Equivalence Checking (LEC), Formal Verification, Static Analysis (Lint), and Hardware Emulation flows | Logic Synthesis, Word-Level Methods, Behavioral Optimization, Abstract Syntax Trees (AST) | Data Structures, Design Patterns, Graph Algorithms, Multi-threading, Compiler Design | Engineered core Word-Level Synthesis features to optimize RTL elaboration for downstream Emulation (ZeBu-equivalent architectures) and Static/Formal Verification tools | Optimized front-end compiler and linting algorithms, improving RTL parsing efficiency and abstract syntax tree (AST) generation for complex SystemVerilog designs | Led code profiling, refactoring, and modernization initiatives for code | Optimized memory footprints and execution runtimes | Designed high-performance algorithms for RTL elaboration | Architected and scaled multiple enhancements | Object-Oriented Design (OOD), Memory Management, Code Profiling, GDB, Valgrind, Linux/Unix | Accelerated C++ software lifecycle delivery by leveraging AI-assisted development tools (Cursor)

Stackforce AI infers this person is a Backend-heavy Fullstack Engineer in the EDA industry.

Location: Noida, Uttar Pradesh, India

Experience: 9 yrs 3 mos

Skills

C++ Language
Logic Synthesis

Career Highlights

Expert in full-stack development with strong C/C++ proficiency.
Led core feature development for EDA tools at Synopsys.
Innovative problem solver with experience in global teams.

Work Experience

Synopsys Inc

Staff Engineer (3 yrs 10 mos)

Adobe

Computer Scientist (7 mos)

Mentor Graphics

Senior Member Of Technical Staff (3 yrs 4 mos)

Member Of Technical Staff (11 mos)

Indian Institute of Technology, Kharagpur

Project (2 mos)

Project (7 mos)

SAMSUNG R&D INSTITUTE INDIA - BANGALORE PRIVATE LIMITED

Summer Intern (2 mos)

Indian Statistical Institute (ISI), New Delhi

Internship (1 mo)

Indian Institute of Technology, Kharagpur

Project (1 mo)

Faculty of Management Studies - University of Delhi

Internship (1 mo)

Education

Integrated MSc at Indian Institute of Technology, Kharagpur

at St. Francis Xavier's Inter College, Kanpur

Vishal Trivedi

Software Engineer

Noida, Uttar Pradesh, India9 yrs 3 mos experience

Most Likely To SwitchAI Enabled

Key Highlights

Expert in full-stack development with strong C/C++ proficiency.
Led core feature development for EDA tools at Synopsys.
Innovative problem solver with experience in global teams.

Stackforce AI infers this person is a Backend-heavy Fullstack Engineer in the EDA industry.

Contact

Skills

Core Skills

C++ LanguageLogic Synthesis

Other Skills

SystemVerilogPlace & RouteDebuggingModern C++ (C++11/14/17)Standard Template Library (STL)Data StructuresGraph AlgorithmsObject-Oriented Programming (OOP)MultithreadingSoftware ArchitectureMemory ManagementDesign PatternsLinuxPython (Programming Language)Synopsys Design Compiler

About

Experience

9 yrs 3 mos

Total Experience

2 yrs 3 mos

Average Tenure

3 yrs 10 mos

Current Experience

Synopsys inc

Staff Engineer

Aug 2022 – Present · 3 yrs 10 mos · Noida, Uttar Pradesh, India · Hybrid

Developed and maintained core features for a word-level synthesizer tool, a crucial component in the EDA workflow.
Supported a wide range of Synopsys products by generating highly optimized circuit designs for downstream use.
Managed end-to-end project responsibilities, from development and implementation to troubleshooting complex customer issues for global clientele.
Contributed to a globally distributed team, ensuring robust and reliable tool performance across different products and use cases.
Architected and scaled multiple enhancements.

C++ LanguageSystemVerilogPlace & RouteLogic SynthesisDebuggingModern C++ (C++11/14/17)+39

Adobe

Computer Scientist

Dec 2021 – Jul 2022 · 7 mos

A key contributor to the Creative Cloud team, responsible for optimizing the front-end performance and resolving user-facing software issues.
Focused on translating user and team feedback into actionable UX improvements, directly shaping the product's user experience.
Demonstrated strong problem-solving skills by investigating and debugging a wide range of complex front-end problems.
Collaborated effectively within an Agile environment to ensure the delivery of high-quality, stable software.

Mentor graphics

2 roles

Senior Member Of Technical Staff

Promoted

Jul 2018 – Nov 2021 · 3 yrs 4 mos · Noida, Uttar Pradesh, India

Part of the synthesis team for the Veloce hardware emulation platform, a leading tool for pre-silicon validation.
Debugged and resolved complex customer-reported issues, collaborating directly with clients to ensure successful and efficient product usage.
Contributed to key performance optimization projects to enhance the speed and efficiency of the synthesis flow.
Developed and integrated new features to expand the capabilities and functionality of the Veloce product for a diverse customer base.

Member Of Technical Staff

Jul 2017 – Jun 2018 · 11 mos · Noida, Uttar Pradesh, India

Indian institute of technology, kharagpur

2 roles

Project

Sep 2016 – Nov 2016 · 2 mos · Kharagpur I, India

Hybrid Recommendation Model On Deep Learning:
Built a recommendation system proposing tags in stack overflow framework incorporating deep learning.
Adapted stacked denoising auto encoder (SDAE) used with probabilistic matrix factorization to enhance the recommendation performance.

Project

Aug 2016 – Mar 2017 · 7 mos · Kharagpur I, India

Restoring an image from collection of blurred Images:
Rectangular matrices of images were reduced to continuous polynomials of higher degrees.
Various optimization techniques such as stochastic optimization etc were implemented to obtain the enhanced deblurred image.

Samsung r&d institute india - bangalore private limited

Summer Intern

May 2016 – Jul 2016 · 2 mos · Bengaluru, Karnataka, India

Peer to Peer Video Streaming:
Peer to Peer communication was established to overcome the latency in data exchange.
Various toolkits and serves were set up in order to initiate, modify and wind up the communication.

Indian statistical institute (isi), new delhi

Internship

Dec 2015 – Jan 2016 · 1 mo · Greater Delhi Area

Analyzing Bagging in Higher Dimensional Subspace:
Studied the notion of instability and theoretical results to analyze the variance reduction and smoothing effect of bagging in hard decision problems.
Reproduced the results of reduction of variance and average mean squared error as mentioned in the paper“Analyzing Bagging by Peter Buhlmann and Bin Yu”

Indian institute of technology, kharagpur

Project

Sep 2015 – Oct 2015 · 1 mo · Kharagpur I, India

Emulate Pricing Model of Cars:
Devised a linear regression model for determining the price of various models of cars.
The results were further enhanced by taking logarithmic modification.