Aug 2015 – Sep 2018 · 3 yrs 1 mo

• Responsible for various features related to low power verification in Questa Simulation. Design and developed features like Power Aware Debug, UPF 2.0/2.1/3.0, Power States and composition, PA Static and Dynamic Checks

Aug 2012 – Jul 2015 · 2 yrs 11 mos

Feb 2010 – Jul 2012 · 2 yrs 5 mos

Nov 2009 – Feb 2010 · 3 mos

• Worked in 1Team Genesis, a product focusing on the capture of design specifications, automated generation of design descriptions/documentation. Specifically worked on IPXACT format.

Jun 2009 – Nov 2009 · 5 mos

• ASIC/FPGA Design and Verification
• IP and Verification IP Design : PCIe Gen3

Dec 2008 – Feb 2009 · 2 mos

• Internship : Power Aware Team, Questasim (at Mentor Graphics, Noida)
• Worked on PCF, SystemVerilog, VHDL, Perl

Jun 2008 – Jul 2008 · 1 mo

• Summer Internship (for Sony Ericsson) : GSM Mobile Phones.