Raksha Derkaje

Software Engineer

Germany3 yrs experience

Key Highlights

Expertise in analog and RF circuit design.
Hands-on experience with FPGA programming and PCB validation.
Proven ability to develop innovative hardware solutions.

Stackforce AI infers this person is a skilled engineer in Electronics and Telecommunications with a focus on hardware development.

Contact

Skills

Core Skills

Analog Circuit DesignRficSoftware DevelopmentEmbedded Systems

Other Skills

Advanced Design System (ADS)AltiumAnalytical SkillsArduinoC (Programming Language)C++Cadence VirtuosoEM SimulationFPGALTSpiceMicrosoft WordPCB DesignProgrammingProject ManagementProteus

About

Recent M.Sc. graduate in Electrical Engineering and Information Technology, with specialization in Information and Communication from Karlsruhe Institute of Technology (KIT). Aiming to apply my expertise in analog / RF circuit analysis and layout design to contribute to hardware development and innovation, aligned with organizational goals.

Experience

Texas instruments

Field Quality Engineer

Nov 2025 – Present · 4 mos · Freising, Bavaria, Germany · On-site

Karlsruhe institute of technology (kit)

Master Thesis Student

Dec 2024 – Jun 2025 · 6 mos · Karlsruhe, Baden-Württemberg, Germany · On-site

Designed a low-noise Transimpedance amplifier(TIA) for Broadband Communication using IHP's 130nm SiGe BiCMOS technology.
Transistor-level design of TIA, Emitter follower and VGA for Broadband up to 75GHz bandwidth.
Performance of two common amplifier topologies, i.e, common emitter and cascode topology,
is compared.
Layout designed using Cadence Virtuoso and post-layout, EM simulation using Keysight Momentum.

Cadence VirtuosoSiGe BiCMOSEM SimulationAnalog Circuit DesignRFIC

Robert bosch automative electronics

Working Student

Feb 2024 – Sep 2025 · 1 yr 7 mos · Reutlingen, Baden-Württemberg, Germany · Hybrid

Developed and implemented dead-time control for a current-sourced gate driver.
Validated the functionality of the developed PCB by using an FPGA to simulate real-world
conditions and verify performance.
Programmed the FPGA using VHDL within the Vivado design suite, ensuring precise control
and accurate testing of the gate driver.

VHDLFPGAPCB DesignAnalog Circuit DesignRFIC

Fraunhofer iosb

Working Student

May 2023 – Sep 2023 · 4 mos · Karlsruhe, Baden-Württemberg, Germany · On-site

Development of a processing tool for person detection using the Yolov8 model.
Programming using Python, followed by testing and validating the processing tool.

PythonYolov8Tool DevelopmentSoftware Development