Shashank Singh

Product Engineer

Noida, Uttar Pradesh, India10 yrs 7 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in RTL design for memory controllers.
  • Strong background in semiconductor validation processes.
  • Proficient in multiple programming languages and design tools.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in RTL and validation processes.

Contact

LinkedIn

Skills

Core Skills

Rtl DesignRegister Configuration

Other Skills

CC++Data StructuresMicrosoft OfficeOVM (basics)PerlRTL ValidationScriptingSystem RDL and Register configurationSystem VerilogVHDLVerilog

Experience

Cadence design systems

2 roles

Principal Design Engineer

Promoted

Jul 2024 – Present · 1 yr 8 mos · Noida, Uttar Pradesh, India

Lead Design Engineer

Nov 2022 – Jul 2024 · 1 yr 8 mos · Noida, Uttar Pradesh, India

  • RTL design engineer for DDR memory controller IP
RTL Design

Mentor graphics

2 roles

Lead Member Of Technical Staff

Promoted

Jan 2021 – Nov 2022 · 1 yr 10 mos

SMTS

Oct 2018 – Jan 2021 · 2 yrs 3 mos

Logic-fruit technologies

FPGA Design Engineer

Jul 2017 – Oct 2018 · 1 yr 3 mos · Gurgaon, India

Intel corporation

Intern

Nov 2016 – Jun 2017 · 7 mos · Bengaluru Area, India

  • Worked with Validation Team for Register Configuration and RTL to RDL Validation.

Ericsson

Engineer

Mar 2014 – Jul 2015 · 1 yr 4 mos · Bengaluru Area, India

  • Worked as a Network optimization engineer.

Education

Malaviya National Institute of Technology Jaipur

Master of Technology - MTech — VLSI Design

Jan 2015 – Jan 2017

National Institute of Technology , Patna

Bachelor of Technology - BTech — Electronics and Communications Engineering

Jan 2009 – Jan 2013

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