Bragadeesh S

Founder

London, United Kingdom11 yrs 6 mos experience
AI EnabledAI ML Practitioner

Key Highlights

  • Founder of a deeptech startup in AI and chip design.
  • Expert in optimizing large language model inference.
  • Proven track record in semiconductor engineering and AI.
Stackforce AI infers this person is a Semiconductor and AI specialist with a focus on high-performance computing.

Contact

bragadeesh153@gmail.com+919952008827LinkedIn

Skills

Core Skills

Artificial Intelligence (ai)Semiconductor IndustryLarge Language Models (llm)Semiconductor EngineeringMathematicsComputer Engineering

Other Skills

AlgorithmsAssembly LanguageCC (Programming Language)C++CPU designCUDAChip ArchitectureCompilersComputer ArchitectureComputer VisionData StructuresDeep LearningDigital Signal ProcessingElectrical Engineering

About

Building a deeptech startup in AI x Chip Design

Experience

Stealth startup

Founder & CEO

Oct 2025 – Present · 5 mos · London Area, United Kingdom · On-site

  • We are re-imagining chip design process using AI.
Artificial Intelligence (AI)Semiconductor Industry

Fractile

Member of Technical Staff

Jul 2024 – Oct 2025 · 1 yr 3 mos · Greater London, England, United Kingdom · On-site

  • - Building Hardware and Software to make LLM Inference 100x faster
Large Language Models (LLM)Semiconductor EngineeringArtificial Intelligence (AI)

Comind

Algorithms and High Performance Engineer

Jul 2022 – Aug 2024 · 2 yrs 1 mo · Greater London, England, United Kingdom

  • ◦ Built a compute device to process brain signals in real time

Imagination technologies

CPU Modelling Engineer

May 2021 – Jul 2022 · 1 yr 2 mos · London Area, United Kingdom

  • - Building IMG's riscv CPU

Texas instruments

Systems and Algorithm Engineer

Jul 2019 – Apr 2021 · 1 yr 9 mos · Bengaluru, Karnataka, India

  • Built 5G transceiver chips (AFE79XX)
  • On Chip ML Inference subsystem
  • Secured two patents

Indian institute of science (iisc)

Research Intern

May 2018 – Jul 2018 · 2 mos

  • Heterogenous CPU + GPU architecture

Texas instruments

Intern

May 2017 – Jul 2017 · 2 mos · Bengaluru, Karnataka, India

  • Novel time-frequency conversion algorithm and on-chip implementation

Defence research and development organisation (drdo)

Intern

Dec 2015 – Apr 2016 · 4 mos · IITM Research Park

  • Optimal Implementation of cryptography algorithms in FPGA

Indian institute of technology, madras

Graduate Teaching Assistant

Jul 2014 – May 2019 · 4 yrs 10 mos

  • Novel CPU Cache Design
MathematicsComputer Engineering

Education

Indian Institute of Technology, Madras

Dual Degree (B.Tech + M.Tech ) — Electrical Engineering

Jan 2014 – Jan 2019

Nanyang Technological University Singapore

Exchange Student — Electrical and Electronics Engineering

Jan 2015 – Jan 2015

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