May 2019 – Oct 2021 · 2 yrs 5 mos

• Lead an AI and Data Sciences team for delivering recommendation engine based products for retail clients. The team built various predictive and recommendation models to improve engagement ROI in loyalty.
• The team built a loyalty ROI technique using machine learning which is very unique and mentioned in BCG white paper. https://www.capillarytech.com/know-how/customer-engagement-bcg/
• Also lead an audio/speech group which develops a deep learning based audio product for in-store retail analytics. The product won first runner-up ward in AWS ISV innovation cup 2021.
• https://yourstory.com/2021/01/meet-three-winners-aws-isv-innovation-cup/amp
• Architected a MLOps framework to scale the availability of accurate models to various customers with different types of Data.
• https://docs.google.com/presentation/d/e/2PACX-1vSMuwckMEKmBt0gd8kQSbX3VMnDdpGpTvEoc9Yip0GHcdq04MW3Xck8KlRuatA8TA/pub?start=false&loop=false&delayms=30000&slide=id.p1

May 2018 – May 2019 · 1 yr

• ML driven Recommendation around campaign, e-comm, retail.

Jan 2017 – Present · 9 yrs 2 mos · bangalore

• The main objective of this group is to promote knowledge and use of deep learning (DL) in particular, and machine learning (ML) in general, in India to solve real problems. The current sub-objectives to support the main objective are:
• 1. Connect a critical mass of DL enthusiasts in India.
• 2. Encourage industry to formulate and share DL problems for students and academicians.
• 3. Become a go-to place to exchange DL ideas and knowledge.

Dec 2016 – May 2018 · 1 yr 5 mos · Bengaluru Area, India

• Microsoft compiler optimization on AMD platforms. Worked to get Microsoft Visual Studio compiler perform better on New AMD CPU called Ryzen.
• Also working to get some deep learning algorithms run faster on AMD Vega GPU.
• Using machine learning to solve some compiler and design problems

Dec 2015 – Oct 2016 · 10 mos · Bangaon Area, India

• Performance and Power Analysis (SPEC CPU, SPEC Power SSJ, Chauffeur WDK,. SPEC SERT)

Apr 2015 – Oct 2015 · 6 mos

• Was an ARM representative in CPU subcommittee

Jan 2014 – Oct 2015 · 1 yr 9 mos

• Competitive CPU power/performance benchmarking. Requires a thorough knowledge on computer architecture, system tuning and S/W and H/W power management.
• big.LITTLE benchmarking and messaging. Mobile use-case performance/power analysis. Compiler version tracking on performance. CPU workload profiling.

Apr 2013 – Jan 2014 · 9 mos · Bangalore

• System performace analysis. Post silicon SoC performance validation. Performance stress testing and lots of scripting to automate the process.

Apr 2011 – Apr 2013 · 2 yrs · Bangalore Urban, Karnataka, India · On-site

• PowerPC validation
• Developed S/W tool to generate machine code that validates PowerPC processor architecture. Thorough knowledge of computer architecture required.

Jan 2010 – Jan 2011 · 1 yr

• VCS runtime code debugging and enhancement.

Sep 2007 – Dec 2009 · 2 yrs 3 mos

• Worked under the guidance of Dr. Melissa Smith, Assistant Professor,
• Reconfigurable computing lab, Electrical and Computer Engineering, Clemson University
• Project : Neutron data acquisition system migration for Oak Ridge National Laboratory.
• Skills : Xilinx Virtex 5 FPGA, PCI-Express Endpoint Core, Xilinx ISE Tools, Xilinx ChipScope Pro, ModelSim Simulator, VHDL, Verilog, Windows Device Driver.
• Performed migration of existing PCI-X based Timing Module (a high speed neutron data acquisition system) to PCI-Express to improve data acquisition performance.
• Contributed in development of a new printed circuit board. Performed hardware debugging to verify the operation of different PCB components.
• Worked with Xilinx Virtex 5 PCI Express Endpoint IP Core to develop the new system.
• Performed in-system debugging and troubleshooting using Xilinx ChipScope Pro Logic analyzer.

Aug 2007 – Dec 2009 · 2 yrs 4 mos

• Focus areas include computer architecture, embedded design, FPGA design, software development, image processing, and high performance reconfigurable computing.
• I worked on FPGA design, PCI Express, and reconfigurable computing.
• My thesis project was FPGA BASED TIMING MODULE AND OPTICAL COMMUNICATION CARD DESIGN FOR SPALLATION NEUTRON SOURCE.

Jan 2005 – Jul 2007 · 2 yrs 6 mos

• Worked as an Oracle Database Administrator.
• Project : Product Alliances Group
• Skills : Oracle 9i/10g database
• Oracle 10g Application Server
• Description:
• Gained good knowledge and experience in Oracle installation and configuration. Performed Oracle installation on almost all the UNIX platforms and also on Windows.
• Planned and Configured Oracle 10g RAC database for our clients. Received appreciation from a major customer on successfully completing a critical installation before production deadline.
• Recovered many databases during the time of crashes or media failures. Many customers appreciated the effort of recovering the production databases with minimum down time.
• Performed tuning on databases and improved performance in many ways.