Deepak Tiwary

CTO

Mumbai, India15 yrs 1 mo experience

Key Highlights

  • Expert in High-Frequency Trading platform development.
  • Proficient in both hardware and software engineering.
  • Extensive experience with major global exchanges.
Stackforce AI infers this person is a Fintech expert with a strong focus on High-Frequency Trading and low-latency systems.

Contact

Skills

Core Skills

C++Software DevelopmentHigh-frequency Trading

Other Skills

ASICAssemblyC (Programming Language)DebuggingElectronic Trading PlatformElectronicsFIX 4FIX-FASTFPGAField-Programmable Gate Arrays (FPGA)HFTITCHLinuxLow LatencyModelSim

About

Over the years, I have evolved from an embedded systems and FPGA specialist into a software developer with a sharp focus on High-Frequency Trading (HFT) platforms. My journey began with mastering embedded projects, where I utilized microcontrollers such as 8051, ARM9, and AVR, and microprocessors from Microchip. This foundation laid the groundwork for my transition into the realm of financial technology. As an RTL coder, I have developed numerous products primarily on XILINX FPGAs, with additional projects on ALTERA platforms, underscoring my versatility in hardware design. The shift towards software development marked a significant turn in my career, where I embarked on creating robust High-Frequency Trading platforms. These platforms cater to various global exchanges including NSE (National Stock Exchange of India), BSE (Bombay Stock Exchange), MCX (Multi Commodity Exchange), SGX (Singapore Exchange), and JPX (Japan Exchange Group), utilizing languages such as C++, C, and Assembly alongside technologies like FIX Protocol 4.0 and FAST Protocol. Specialties: - Expertise in Assembly (NASM), VHDL, and Verilog for both Xilinx and Altera platforms. - Proficient in C and C++, with a strong grasp of STL, Boost libraries, and Template Metaprogramming. - Deep understanding of market data protocols including ITCH, OUCH, and the FIX Protocol 4.0. - Extensive experience in AFL Coding, system integration, and optimization of Network Processor Cards (WN66XX) for HFT applications. - Profound knowledge and practical application experience in major global exchanges such as CME, NSE, BSE, MCX, SGX, and JPX. Throughout my career, I've consistently aimed to bridge the gap between complex technology solutions and the dynamic needs of high-stakes trading environments. I am continually seeking to expand my network with professionals who are as passionate about technology and finance as I am. If you're interested in sharing insights or exploring collaborative opportunities, I welcome you to connect with me.

Experience

Ebullient securities

Chief Technology Officer

May 2023Sep 2024 · 1 yr 4 mos · Gurugram, Haryana, India · On-site

Cd integrated services ltd. - india

Senior Technical Architect

Jan 2020Dec 2022 · 2 yrs 11 mos · Ahmedabad, Gujarat, India · On-site

PgSQLC (Programming Language)C++QtPython (Programming Language)Software Development

Greenland investment management

Senior infra developer

Jan 2017Dec 2019 · 2 yrs 11 mos · Mumbai, Maharashtra, India

Blb limited

Project Manager

Feb 2015Dec 2016 · 1 yr 10 mos · New Delhi Area, India

  • HFT Platform Devlopment

Open futures group

Sr Engineer Technical

Jun 2013Jan 2015 · 1 yr 7 mos · New Delhi Area, India

  • NSE&BSE-Designed and implemented complete trading platform for BSE &NSE from scratch. Used assembly to cut down the runtime unlooping functions timings. Used FIX-FAST for decoding UDP-TBT multicast market feed. Used multithreading architecture for order manager, order adapter and strategy server. Use prefilled orders to cut-filling cost before order hitting to exchange.
  • MCX- Implemented decompression algo(XCEED for linux) and FIX-4.2 parser for order adapter.
  • NSE- implemented order adapter using C++.
  • Implemented Timing analysis component for latency calculation of the framework, and tried to
  • Optimize to its bare minimum active path latency.
  • Usage of Kernel bypass technique such as zero-copy onload technique for data receiving and
  • Transmission in socket communication (Stream, Datagram and RAW BSD sockets).
  • Full working system of NSE, having UDP-TBT multicast market feed, strategy engine, order manager and order adapter .completely Designed and implemented whole system on WN66XX board having ultra-low latency of few micro second.
  • Written device driver for board PCI to be used by Host computer to transfer data for order adapter.

Wesee, ministry of defence

Hardware Engineer

Dec 2010Jul 2013 · 2 yrs 7 mos · New Delhi Area, India

  • Analysis the ship requirement & design the hardware as well as software to incorporate the latest technology in the ship.
  • Implement the requirement on Embedded and FPGA Platform.
  • Project related meetings and seminars to grab projects for WESEE.
  • Develop the various communication protocols within a ship and radar.
  • Entire project documentation technical manual.

Www.srspvtltd.com

Design Engineer

Jan 2008Jan 2010 · 2 yrs · New Delhi Area, India

  • Analysis & Design of firmware for Lab Kits and Training module
  • Testing and debugging using Simulation Tools like Xilinx, Modelsim XE III 6.3c (FPGA), KEIL and MPLAB-ICD2 debugger etc.
  • Meet business requirements by solely designing firmware for multiple projects.
  • Work with Hardware engineers to determine requirements and integrate hardware & software.
  • Provides technical support for new and existing products.

Education

CDAC Pune

PG DIPLOMA IN VLSI — FPGA

Jan 2007Jan 2008

Motivational Pathway

Bachelor of Engineering (BEng)

Jan 2003Jan 2007

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