Raghu Srinivasamurthy — Software Engineer
Masters in VLSI System Design with 6+ years of experience in FPGA/RTL Design. Passionate engineer with knowledge on digital design and RTL programming. Driven by passion for acquiring knowledge. Languages: VHDL, Verilog, Matlab Softwares: Xilinx Vivado, Xilinx ISE, Matlab
Stackforce AI infers this person is a Defence FPGA Design Engineer with extensive experience in hardware engineering.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 9 mos
Skills
- Fpga Prototyping
- Hardware Engineering
- Rtl Design
Career Highlights
- 6+ years of experience in FPGA/RTL Design.
- Expertise in VHDL and Verilog for digital design.
- Proven track record in defence project development.
Work Experience
Silicon Labs
Lead Engineer (1 yr 11 mos)
Samsung R&D Institute India
Chief Engineer (6 mos)
GLOBALFOUNDRIES
Sr Eng Test Engineering (FPGA Design & Verification) (2 yrs 5 mos)
Mistral Solutions Pvt. Ltd
Senior FPGA/RTL Design Engineer (5 mos)
FPGA/RTL Design Engineer (2 yrs 1 mo)
Intern FPGA/RTL Design (5 mos)
Defence Research and Development Organisation (DRDO)
FPGA Engineer (Onsite Role) (3 mos)
Siker Systems
Trainee FPGA Design Engineer (2 mos)
Education
Master's degree at M. S. RAMAIAH UNIVERSITY OF APPLIED SCIENCES
Bachelor of Engineering - BE at PES College of Engineering, Mandya