Sridhar Reddy

CEO

Orlando, Florida, United States10 yrs 1 mo experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in RTL design and verification methodologies.
  • Proven track record in GPU architecture and power management.
  • Strong foundation in digital design and microarchitectural optimizations.
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in GPU architecture and digital design.

Contact

Skills

Other Skills

ARM ArchitectureAlgorithmsCC++CPU designCircuit DesignComputer ArchitectureComputer ArithmeticComputer HardwareData StructuresGNU DebuggerGraphics Processing UnitHTMLIntegrated Circuit DesignJava

About

Logic design lead in Geometry Subsystem in Radeon GPU Team at AMD. - Key Skills: Digital Design, Functional Verification, Constraint based Random Verification, Coverage driven verification, Assertion based verification. - HDL: VHDL, Verilog, System Verilog -Methodologies: UVM - Tools: Cadence: Virtuoso, Encounter, Synopsys: VCS, DVE, TetraMax, IC Compiler, PrimeTime, Formality,HSPICE Mentor Graphics: Modelsim, Calibre, Xilinx: Vivado,ISE, MATLAB. To contact me,I can be reached at sridharreddy755@gmail.com

Experience

Amd

3 roles

Senior Member of Technical Staff

Promoted

Jul 2025Present · 8 mos

  • Geometry RTL Design

Staff RTL Design Engineer

Jul 2022Jul 2025 · 3 yrs

  • RTL Design lead for the Primitive assembly of Geometry sub system

Sr GPU RTL Design Engineer

Aug 2018Jul 2022 · 3 yrs 11 mos

  • .RTL/Logic Design for the Prim IP/Setup block in Graphics pipeline.
  • .Worked on a Shader based Power Management feature, including prototyping & bring-up.
  • .RTL Power optimizations for the Shader I/O subsystem.

Samsung sarc | acl

CPU RTL Design Intern

May 2017Dec 2017 · 7 mos · Austin, Texas Area

  • Microarchitectural optimizations of the CPU Front end unit for Power.
  • UVM Infrastructure development for the Power Monitor

Drdo, bangalore

RTL Design Engineer

Aug 2014Jun 2016 · 1 yr 10 mos · Bengaluru Area, India

  • Worked with integrating IP like DDR3, Aurora Serial Bus, Flash memory controller.
  • Designed a Flash memory controller for the Spansion NOR Flash

Alethelabs

Summer Intern

May 2013Jul 2013 · 2 mos · Gurgaon, India

  • Solar Energy Harvesting Circuit Design

Iiit hyderabad

Intern

May 2012Jul 2012 · 2 mos · Hyderabad Area, India

Education

University of Minnesota

Master of Science (MS) — Electrical Engineering

Jan 2016Jan 2018

Indian Institute of Technology, Roorkee

Bachelor of Technology (B.Tech.) — ECE

Jan 2010Jan 2014

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