Rohan Seth — CEO

Analog Design and Verification Engineer with 10+ years in mixed-signal SoC development, specializing in behavioral modeling and emulation methodologies. I work at the intersection of analog circuit design and digital verification, contributing to early system validation and helping accelerate product schedules from specification to silicon bring-up. **Digital Mixed-Signal (DMS) Modeling** I focus on developing circuit-level behavioral models for DMS flows that support full-chip verification before analog layouts are complete: 1. **Real-Number Models:** Building accurate representations of RF Circuits (Mixer, LNA, VGA, Filters), Power Management, ADCs/DACs, Amplifiers, Bandgaps, and PLLs with schematic consistency validation. 2. **Fixed-Point Optimization:** Translating real-number models into fixed-point for emulation platforms, working through bit-width requirements, quantization effects, and numerical stability while managing resource constraints. 3. **AMS Verification:** Integrating models with digital RTL in UVM/OVM environments using Cadence ADE-L/XL to support comprehensive verification and hardware-software co-verification. **Emulation & HLS** 1. **HLS Development:** Using High-Level Synthesis to create synthesizable analog models from C++/SystemC, which helps accelerate development and enables area/timing optimization. 2. **Emulation Platforms:** Working with Palladium for full-chip validation, optimizing fixed-point models for throughput through partitioning and cycle-accurate correlation. 3. **Early Validation:** Developing emulation-ready models that help enable firmware development earlier in the schedule. Hardware-software co-emulation provides valuable system validation before silicon. **Technical Skills** Python, C++, SystemVerilog, Verilog, VHDL, SystemC | Emulation (Palladium) | HLS | Cadence ADE-L/XL | Git, Perforce | Unix/Linux | Embedded systems & lab debug **What I Bring** I enjoy cross-functional collaboration and helping bridge analog and digital domains. My experience across transistors, emulation, and silicon helps me develop practical models that support product development. I'm motivated by analytical problem-solving and contributing to successful products. Always learning and interested in challenging mixed-signal projects.

Stackforce AI infers this person is a Mixed-Signal IC Design expert with a focus on Analog and Digital Verification.

Location: San Francisco, California, United States

Experience: 9 yrs 10 mos