Raghav Chaudhary

Software Engineer

Noida, Uttar Pradesh, India14 yrs 3 mos experience
Highly Stable

Key Highlights

  • Expert in FPGA prototyping and simulation technologies.
  • Strong background in software engineering across multiple companies.
  • Proficient in debugging and developing complex systems.
Stackforce AI infers this person is a Software Engineer with expertise in FPGA and simulation technologies.

Contact

Skills

Other Skills

AlgorithmsCC++Data Structure and AlgorithmsData StructuresDebuggingEmbedded SystemsJavaLinuxMobile DevicesPerlProgrammingRequirements AnalysisShell ScriptingSimulations

Experience

Synopsys inc

Software Engineer

Nov 2024Present · 1 yr 4 mos · Noida, Uttar Pradesh, India · On-site

Cadence design systems

3 roles

Software Engineer

Jul 2022Oct 2024 · 2 yrs 3 mos · Noida, Uttar Pradesh, India

Principal Software Engineer

Jul 2019May 2021 · 1 yr 10 mos · Noida Area, India

Lead Software Engineer

Jun 2017Jun 2019 · 2 yrs · Noida Area, India

Real intent

Software Consultant

May 2021Jun 2022 · 1 yr 1 mo · Noida, Uttar Pradesh, India

Mentor graphics

2 roles

Lead Member of Technical Staff

Aug 2015Jun 2017 · 1 yr 10 mos

  • Product: FPGA Based Prototyping:
  • Projects: Runtime System for FPGA Prototyping:
  • a. Create User Interface.
  • b. Inter Process Communication.
  • c. Integrating third Part Libraries
  • d. Board File Generator:
  • e. Automated the flow for Design partioning.
  • f. Displaying the results in an HTML/XLS Format

Senior Member Technical Staff

Apr 2013Jul 2015 · 2 yrs 3 mos

  • Product: Simulation Accelerator:
  • Projects:
  • 1. Creating the front end of the Product for the user interaction in TCL with Auto Completion and History maintenance with the help of TECLA Library. Implementation of Dictionary: Ternary Search Tree for storing the words.
  • 2. Wrote the Debug infrastructure for setting up the HW breakpoints of our Custom Logic Processor, helps in examining the HW registers and their states. Some of the commands are similar to GDB(step,cont/info,etc).
  • 3. Created Debug/Production and Assertion Builds and its Infrastructure. Productization of the S/W according to the different generated builds.
  • 4. Created the Non-Recursive Make Build Infrastructure in our Product.
  • 5. Worked on Verification of the IP of the HW Accelerator in System Verilog.
  • 6. Multi-Process Communication through File I/O Layer, where File Read/Write is responsible for communication between two processes.
  • 7. Wave form Generation for the simulator. Creating a messaging System in the S/W to curb/allow messages to print.
  • 8. Signal Trapping, where S/W creates its own Stack Trace in case of SEGFAULT. HANDLING SIG_INT and check/poll the state of the S/W and H/W and then resume with the Flow.
  • 9. Support For Regression Infrastructure.
  • 10. C++ Trainer for the New Joinees

Mediatek

Software Engineer - I

Jul 2011Mar 2013 · 1 yr 8 mos · Noida Area, India

  • Experience of working on Multiple Binary Architecture and Dynamic RAM usage.
  • Experience of regional language engine like BIDI, ICU and proprietary engines for Indian, Arabic and south east languages.
  • Working on bitmap font engine
  • Experience of working on mobile editor and IME.
  • Experience of working on RTOS (Nucleus Plus) and mobile processors like ARM7/ARM9.
  • Proficiency at various levels of product development from requirement gathering, requirement analysis, design, development, system testing and documentation.
  • Strong analytical, programming and debug skills.

Education

Dr. B. R. Ambdkar Natonal Institute Of Technology, Jalandhar

Bachelor’s Degree — Computer Science

Jan 2007Jan 2011

SVKM

HSC — Non-Medical

Jan 2005Jan 2007

St Anne's high School

SSC

Jan 1995Jan 2005

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Raghav Chaudhary - Software Engineer | Stackforce