Shivam Rajpal

Director of Engineering

Bengaluru, Karnataka, India11 yrs 6 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Led a team of 11 in data life cycle management.
  • Developed solutions for selective backup and restore.
  • Optimized performance for Intel's neural network processor.
Stackforce AI infers this person is a SaaS and Networking expert with strong capabilities in software development and performance optimization.

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Skills

Core Skills

Software DevelopmentData AnalysisApi Performance OptimizationPerformance OptimizationDeep LearningDistributed SystemsPerformance MonitoringSoftware Architecture

Other Skills

AlgorithmsC++Data Driven SoftwareData StructuresJSONJavaLarge Scale SystemsMultithreaded DevelopmentObject-Oriented Programming (OOP)ProgrammingPythonReactive ProgrammingRedundancy ManagementScalaSoftware Design Patterns

About

I am a software engineering manager with overall 11 years of experience, 10 years as a software development engineer and 1 year in management.

Experience

Rubrik

4 roles

Sr. Technical Lead Manager

Promoted

Jun 2024Present · 1 yr 9 mos

  • * Technically led and managed the data life cycle team of 11 members (including SDE1, SDE2, senior software engineers and interns)

Staff Engineer

Apr 2024May 2024 · 1 mo

  • * Technically led the data life cycle team of 10 members.

Sr Software Engineer

Oct 2021Mar 2024 · 2 yrs 5 mos

  • Built a solution for selective backup and restore of entire Rubrik cluster configuration, enabling cluster replacement.
  • Technically led the data life cycle team of 10 members.
  • Built various tools to track metrics, prioritize and do data analysis for customer issues, test pipelines, backlog, projects etc.
  • Primary languages used: Scala, Python
ScalaPythonSoftware DevelopmentData Analysis

Software Engineer

Sep 2019Sep 2021 · 2 yrs

  • Worked on managing various aspects of data life cycle (like backup scheduling, expiry, policy definitions etc.) in Rubrik's on-prem backup and recovery solution.
  • Worked on improving performance of APIs and building an infrastructure to catch any regressions.
  • Built a solution for garbage collection of object metadata that is shared across multiple processes and across multiple clusters.
  • Worked on providing cloud cost insights for archival policy changes for backups.
  • Primary languages used: Scala, Python
ScalaPythonSoftware DevelopmentAPI Performance Optimization

Intel corporation

Deep Learning R&D Engineer

Feb 2019Sep 2019 · 7 mos · Bengaluru Area, India

  • Worked on various performance optimizations in software stack for Intel's neural network processor for training (NNP-T 1000)
  • Designed and implemented pattern replacement framework in computational graph
  • Primary language used: C++
  • Received three Peer Appreciation Awards from Srinivas Lingam, Grzegorz Trzebiatowski and Ramesh Babu in Aug 2019
C++Performance OptimizationDeep Learning

Infinera

3 roles

Sr SW Develop Engr

Promoted

Nov 2017Feb 2019 · 1 yr 3 mos

  • Helped in scaling management plane of network nodes
  • Proposed and implemented dual version concurrency control for fast read access of distributed systems by running transactions on copies of objects, instead of original objects, original ones being highly available for reads
  • Provided early management read access and respective gradual write access to different elements of network nodes
  • Provided boot up status of network nodes
  • Implemented aggregation mechanism for attribute value change notifications (fast producer slow consumer problem)
  • Made some of the software processes independently restart-able and re-sync-able with other processes.
  • Optimized performance monitoring database for both performance and memory. Reduced memory space consumption to almost half.
  • Primary language used: C++
  • Won Most Promising Project Award in Infinera Hackathon, Sep 2018 over 56 teams
  • Received Peer Appreciation Award "You Rock!" from Dilip Ponguru, Sr SW QA Engr, Infinera in Jun 2018
C++Distributed SystemsPerformance Monitoring

SW Develop Engr 2

May 2016Oct 2017 · 1 yr 5 mos

  • Designed and implemented multiple aspects of Infinera's next generation software architecture (Scalability focused design driven by reactive programming)
  • Implemented multi-threaded distributed read access of the system for fast sync of GUI clients
  • Made many software elements data driven to improve software manageability
  • Primary language used: C++
  • Received Peer Appreciation Award "You Rock!" from Ujjwal Sharma, Mgr, SW Dev, Infinera in Mar 2017
C++Software ArchitectureDistributed Systems

SW Develop Engr 1

Apr 2014Apr 2016 · 2 yrs

  • Provided plethora of designs, enhancements and improvements in Infinera Distributed Framework (Distributed transactions, Sync across different devices, Alarms, Notifications, Performance monitoring etc.)
  • Enhanced Infinera Distributed Framework to link and load shared objects at runtime
  • Wrote management plane modelling for few network devices
  • Developed management command and autonomous events verification automation tool, supporting various interfaces, in Python
  • Primary language used: C++
  • Received Peer Appreciation Award "You Rock!" from Rishab Joshi, SW Engr (Systems) 2, Infinera in Sep 2015
  • Won Star Award in Infinera Hackathon, Jun 2015 over 41 teams
  • Received Peer Appreciation Award "You Rock!"​ from Ashok Kunjidhapatham, Principal SW Engr (Systems), Infinera in Nov 2014
C++Distributed SystemsSoftware Development

Fiorano software

Trainee Software Engineer

Jan 2014Mar 2014 · 2 mos · Bengaluru Area, India

  • Worked on FioranoMQ based on C++, Java & JMS2.0
C++Java

Stmicroelectronics

Intern

Jan 2013Jul 2013 · 6 mos · Greater Noida, India

  • Worked on Standard Cell Layout Design, Analysis & Optimization
  • Designed layouts of various standard cell libraries on 28nm SOI, 32nm & 40nm technologies in both single and double heights and in different tracks for various active projects of the organization
  • Did post-layout Netlist Extraction of standard cells
  • Did ELDO extraction of master-slave flip-flop timing metrics and their optimization
  • Did Monte-Carlo Analysis of master-slave flip-flops

Grey orange robotics pvt. ltd.

Trainee

May 2011Jul 2011 · 2 mos · New Delhi Area, India

  • Designed PCB Layouts, using EAGLE software, for various products of Grey Orange Robotics
  • Developed RFID Door Lock as fun project, using Arduino and ID-12 Reader

Education

BITS Pilani K.K. Birla Goa Campus

B.E.(Hons.) — Electronics & Instrumentation

Jan 2009Jan 2013

Asha Modern School, Saharanpur

Jan 1995Jan 2009

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