Oct 2021 – Nov 2023 · 2 yrs 1 mo

• Execute new design to be incorporated into codebase.
• Enabled THUMB2 on SoC and fixed issues on device crashes by analyzing the root cause and understanding PSCI Specification.
• Serve as primary point of contact for Runtime Power Management (PM) issues.
• Spearhead the development and implementation of new feature requests tailored to specific target platform/ kernel version.
• Diagnose and resolve issue within the upstream community related to Low power framework , contributing to their timely resolution.
• Deliver expert level debug support to technical teams when debugging extended beyond driver scope.
• Work code reviewer for power management drivers to ensure code quality and compliance.
• Mentor test teams to improve test environment.

Apr 2020 – Oct 2021 · 1 yr 6 mos

• Contributed all phases of SoC development ( pre silicon, post silicon, production) and bring-up activities.
• Developed new driver to collect precise statistical data regarding Low Power Mode utilisation, benefiting multiple geographically dispersed teams.
• Gained good understanding on ARM Architecture ( ARMv7, ARMv8)
• Integrated target specific Low Power Mode adjustments and validated their functionality during the emulation phase.
• Expertly managed internal PDT, CDT, APT issues, Conducting in-depth debugging to identify root cause or escalate issues to team.
• Created comprehensive test plans and design document for L0 testing.

Oct 2018 – Apr 2020 · 1 yr 6 mos

• Understanding of MHI-BHI and bit knowledge of PCIe protocol,
• Written driver for device connected over PCIe and uses MHI-BHI as communication protocols.
• Part of PBL (Primary boot loader) team for two chips.
• Involved into chip bring-up activities .
• Understanding of coreboot.

Feb 2017 – Oct 2018 · 1 yr 8 mos

• Enabled USB debug console
• Enabled USB UAS (USB Attached SCSI) support to enhance speed of USB 3.0 by 20% to 30%.
• USB UAS debugging experience with upstream Maintainer.

Nov 2015 – Jan 2017 · 1 yr 2 mos

• Uboot Customization for SPEAR1310 (ARM Cortex-A9).
• Implemented IO emulator which will respond to command. The Real IO functionalities (response on
• commands) are replicated on IO Emulator board (ARM Cortex A8 Soc) on Linux platform.
• Also worked for schematic drafting till netlist creation using Cadence Allegro Design Entry HDL.
• Cost reduction, Data sheet reading etc.

Nov 2014 – Oct 2015 · 11 mos

• Trained in Core JAVA and Advanced JAVA.
• Knowledge of MySQL , Oracle 10g.