Hitesh Gupta

Software Engineer

San Jose, California, United States8 yrs 6 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in silicon optimization and synthesis tools.
  • Proven track record in developing real-time data visualization tools.
  • Strong leadership experience in software engineering roles.
Stackforce AI infers this person is a Software Engineer specializing in silicon optimization and hardware design.

Contact

Skills

Core Skills

C++Data StructuresObject-oriented Programming (oop)

Other Skills

silicon Optimizationlogical optimizationssynthesis toolsmultithreaded componentstiming optimizationsarea/power optimizationsincremental optimizationflop mergingschedulingmanagement skillscross platform UIreal-time data visualizationanomaly detectionsimulator designhardware design

About

Aspiring Software Developer, Enthusiastic, Ambitious, Quick learner ! A person to take on the everyday EDA challenges. Working out algorithms and solutions for the computationally intensive data points.

Experience

8 yrs 6 mos
Total Experience
2 yrs 2 mos
Average Tenure
5 yrs 7 mos
Current Experience

Cadence design systems

5 roles

Principal Software Engineer

Promoted

Jan 2026Present · 4 mos

Lead Software Engineer

May 2023Jan 2026 · 2 yrs 8 mos

  • building top of the shelf synthesis,pnr tools for chip optimizations. silicon Optimization. Building logical optimizations for Genus, Innovus
silicon Optimizationlogical optimizationssynthesis toolsC++Data structures

Lead Software Engineer

Promoted

Jul 2022May 2023 · 10 mos

SDE-2

Oct 2020Jul 2022 · 1 yr 9 mos

  • Worked on developing few optimizations technique
  • stabilizing the synthesis tool multithreaded components,
  • Multithreaded timing and area/power optimizations
  • Intricate flow debugs
multithreaded componentstiming optimizationsarea/power optimizationsC++Object-Oriented Programming (OOP)

SDE-1

Jun 2019Jul 2020 · 1 yr 1 mo

  • Part of the Incremental optimization R&D team responsible for solving some chip level optimization problems relating to flop merging, critical region resynthesis, timing and area driven optimizations
incremental optimizationflop mergingtiming optimizationsC++Data structures

Samsung

Software Developer Intern

May 2018Jul 2018 · 2 mos · Bengaluru, Karnataka, India

  • Worked as an intern in Flash SSD Department, Samsung Bangalore.
  • Developed a cross platform UI using electron to graphically plot and allow user to visualize real
  • time data generated by various hardware devices as well as to detect anomaly in device
  • behavior using majority voting by Knn, K-means and K-medoid and minimal Cause prediction.
  • Awarded the tiltle of "BEST INTERN UDAAN -2018".
cross platform UIreal-time data visualizationanomaly detectionC++Object-Oriented Programming (OOP)

Delhi college of engineering

Placement Coordinator

Mar 2018May 2019 · 1 yr 2 mos · New Delhi Area, India

  • Being placement coordinator at Dtu involves possessing excellent scheduling and management skills.
schedulingmanagement skills

Sse-dtu

General Secretary

Jul 2017Jul 2018 · 1 yr · New Delhi Area, India

  • SSE-DTU is one of the top technical societies of DTU, an initiative of software engineering branch to give people an idea of what actually a corporate project involves other then coding.
  • Being general secretary of SSE involves managing day to day tasks of SSE, organising SIGs, workshops and coding events.

Samsung semiconductor research

Software Engineer Intern

Jun 2017Jul 2017 · 1 mo · Bengaluru Area, India

  • Worked as an intern in Memory Solutions Department, Samsung Bangalore.
  • Used IP-XACT std. and Qt environment to develop SIMULATOR DESIGNER FRAMEWORK(SDF) -A
  • software tool to draw and simulate hardware designs and automatically generate the code at
  • backend.
  • The framework accepts hardware models defined using IP-XACT standard.The hardware design
  • can be easily made and at backend the corresponding executable file for the design is autogenerated
  • providing user the capability to test the design.
  • Received PIO(Pre-Internship Offer) and appreciation from Vice-president, Memory Solutions, Samsung
simulator designhardware designIP-XACT standardC++Object-Oriented Programming (OOP)

Education

Delhi College of Engineering

Bachelor of Technology - BTech — Computer Engineering

Jan 2015Jan 2019

Hansraj smarak school

CBSE Senior secondary examinations — Science

Jan 2014Jan 2015

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