Krishna Chaitanya Sankisa

Software Engineer

Hyderabad, Telangana, India9 yrs 6 mos experience
Most Likely To SwitchHighly Stable

Key Highlights

  • Expert in GPU compiler development at AMD.
  • Recognized for contributions to LLVM and MLIR.
  • Proven track record in neural network optimization.
Stackforce AI infers this person is a Semiconductor and Machine Learning specialist with a focus on compiler technologies.

Contact

Skills

Core Skills

CompilersGpuEmbedded Software

Other Skills

HIPFlang-MLIRClangIROpenMPLLVMAddressSanitizerpytorchMLIRC++Neural NetworkGraph CompilerTrustzoneCircuit DesignDebug Tool DevelopmentC

About

GPU Compiler Engineer specializing in MLIR, LLVM, and Graph Compilers. Working for AMD on development of HIP, ClangIR and OpenMP compilers. Github profile: https://github.com/skc7 LLVM Commits: https://github.com/llvm/llvm-project/commits/main/?author=skc7 LLVM PRs: https://github.com/llvm/llvm-project/pulls?q=is%3Apr+author%3Askc7

Experience

Amd

2 roles

Member of Technical Staff

Promoted

Jul 2023Present · 2 yrs 8 mos

  • Working on HIP, Flang-MLIR and ClangIR compiler development for AMDGPU.
  • ● Enabling clangIR with AMDGPU and HIP language support.
  • ● OpenMP 6.1 GPU Kernel Language implementation in MLIR omp dialect. MLIR PRs #162704, #153562.
  • ● OpenMP 6.0 fortran workdistribute construct implementation, which is a requirement for HPC customers from the super computing domain. FLANG-MLIR PR: #140523
  • ● Migrated pytorch codebase to support LLVM 17 opaque pointers feature. Pytorch PR: #101396
  • ● Worked on compiler support for composable kernels library for which I received AI group VP recognition, Next 5% award.
  • ● Lead AddressSanitizer tool development for LDS addressing errors in AMDGPU which helped Alibaba to fix memory errors in LLM tensorflow training. PR: #87265
  • ● Worked on HIP runtime and compiler interaction through code object for hidden dynamic LDS implicit kernel argument enablement. PR: #65273
  • ● Migrated all the sanitizer passes (asan, memsan, tsan etc) to be idempotent: PR: #99439
  • ● Introduced “maybe_undef” attribute in clang to support shfl _sync cuda-like operations in HIP. PR: D130244. This effort was mentioned in LLVM weekly Aug 2022, #448
HIPFlang-MLIRClangIROpenMPLLVMAddressSanitizer+3

Senior Software Development Engineer

Oct 2021Jun 2023 · 1 yr 8 mos

  • AMDGPU LLVM Compiler development.
LLVMCompilers

Blaize

Software Development Engineer II

Oct 2018Oct 2021 · 3 yrs · Hyderabad Area, India · On-site

  • Neural Network Graph Compiler backend development
  • Developed C++ runtime framework to optimally execute neural network model from ML compilers like glow, TVM etc on Blaize hardware accelerator.
  • Extensively worked on Convolution neural network model execution which includes graph optimizations, partitioning and scheduling.
C++Neural NetworkGraph CompilerCompilers

Qualcomm

Software Engineer

Aug 2016Sep 2018 · 2 yrs 1 mo · Hyderabad Area, India

  • Developed C++ Trustzone apps for Secure display feature.
C++TrustzoneEmbedded Software

Texas instruments

Design Engineering Intern

Jan 2016Jun 2016 · 5 mos · Bengaluru, Karnataka, India

  • Worked on active thyristor gate control circuit design.
Circuit Design

Qualcomm

Software Engineer Intern

May 2015Jul 2015 · 2 mos · Bengaluru, Karnataka, India

  • Worked on debug tool development in WLAN team.
Debug Tool Development

Education

Birla Institute of Technology and Science, Pilani

B.E Electronics and Communications Engineering

Jan 2016Present

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