Prakash Pali — Firmware Engineer

Meta India (Facebook) (March 2025 – Present) Role: Staff ASIC Engineer =================================================================================== Designed and implemented (IPC) between sub-systems, and extended authentication services over IPC. Optimized boot code, drastically improving boot timing from 100ms to 80ms by parallelizing sub-systems and reducing busy wait. Reduced the DV test bench time from 3 days to 1 day by optimizing test variants of the boot code. Maintained and optimized bare metal and Zephyr-based firmware, while utilizing AI for tool development (binary size trackers, CI/CD reporting). Implemented Crashdump for first and second stage boot loaders. Apple India Pvt Ltd (March 2024 – March 2025) Role: Staff Embedded SW Engineer =================================================================================== Performed bring-up of new SOCs and executed debugging at NPI facilities during different release cycles. Maintained and enhanced test infrastructure for PCIe, SPMI, GPIOs, SIM slots, and wireless SKUs using Python and Lua. Stress-tested Wireless Modem platforms, collaborating closely with relevant teams to resolve test failures. Tracked daily test failures to implement workarounds and fixes that enhanced the Units Per Hour (UPH) at NPI facilities. Qualcomm India Pvt Ltd (July 2017 – March 2024) Roles: Engineer -> Senior Engineer -> Lead Engineer =================================================================================== Developed CoreBSP drivers (RTOS) for peripherals including I2C, I3C, UART, SPI, QSPI, FLASH, PSRAM, Clock, MPU, and GPIO. Engineered key software features such as Boot from FLASH, XIP from FLASH, Device Configuration, Coredump, and Secure Heap. Led slow-speed peripheral drivers development and managed technical tasks with multiple team members, delegating and assisting juniors and contractors. Ported FreeRTOS to multiple SOCs and built full-fledged Python test frameworks. Conducted bring-up for various IoT, voice & music platforms, as well as unit and DV testing. Infineon Technologies (July 2015 – July 2017) Role: Associate Engineer =================================================================================== Developed a PoC for Power Cycling using, specifically handling ECU-ECU communication via CAN and I2C. Created tests for the Power Cycling Validation, covering supply levels, sequencing, slopes, and overload/short detection with PVT variation. Authored test cases for Standby and Sleep modes to validate overshoot, undershoot, and Standby SRAM functionality.

Stackforce AI infers this person is a highly skilled Embedded Software Engineer with extensive experience in firmware development and debugging.

Location: Bengaluru, Karnataka, India

Experience: 10 yrs 10 mos