Ashish Kumar — Director of Engineering

I have more than 22 years in ASIC/SOC domain with following main skills: • Rtl coding in VHDL/Verilog. • Integrate the different IP’s at SOC level. • Synthesis. • Constraints(sdc) propagation and qualification. • Pre and postlayout timing analysis(STA). • Full chip clock definition for CTS implementation. • Formal verification. • SOC design flow. • Expertise in Timing Commit and Clocking Strategy. • Expertise in defining Full chip reset strategy. • CTS review and support. • Low power implementation. • SOC PIOmux : defining specs and rtl generation • Extensively worked on high definition Set Top Box with 10+ tape out with Good Success record. • Currently working in Mobile SoC/Modem domain. . Successfully tape out 5 Mobile SoC as Chip lead..

Stackforce AI infers this person is a seasoned ASIC/SOC design expert with extensive experience in mobile and consumer electronics.

Location: Bengaluru, Karnataka, India

Experience: 24 yrs 10 mos