Avinash Suresh

CEO

Hyderabad, Telangana, India17 yrs 3 mos experience

Highly StableAI Enabled

Key Highlights

Over 15 years of software development experience
Owner of 6 patents in technology
Expert in DSP and product management

Stackforce AI infers this person is a leader in EDA with strong expertise in software development and product management.

Contact

Skills

Core Skills

Software DevelopmentProduct ManagementTeam LeadershipInfrastructure Development

Other Skills

System Generator for DSPAI Engines block libraryTeam ManagementProduct DevelopmentAI EnginesDSPMentorshipFeature ArchitectureVivado System GeneratorPrototypingCustomer EngagementDSP AlgorithmsSimulation InfrastructureSource Code ManagementBlockset Development

About

I enjoy working with passionate engineers to build high-quality products and contribute both as a software architect and Manager. Currently leading the development of Vitis Model Composer (System Generator for DSP) projects at Xilinx. My expertise lies in Software Development Engineering, with over 15 years of experience. I have experience in building, training, and inspiring teams to develop and deliver top-quality solutions. I am the owner of 6 patents and have a Bachelor’s degree in Electronics & Communication Engineering. Technical Skills: Software Development Lifecycle - Agile & Scrum Methodologies; Product Development & Management; Languages: Proficient in C/C++, STL, Boost, MATLAB, VHDL, Verilog; Operating Systems: Linux, Windows; HDL-based Tools: Vitis & Vivado tools, Questa Simulator. Model Composer

Experience

17 yrs 3 mos

Total Experience

6 yrs 6 mos

Average Tenure

4 yrs 2 mos

Current Experience

Amd

2 roles

Senior Manager Software Development

Promoted

Jul 2022 – Present · 3 yrs 9 mos · Hyderabad, Telangana, India

Manager Software Development

Feb 2022 – Jul 2022 · 5 mos · Hyderabad, Telangana, India

With the AMD acquisition, Xilinx is now in the AECG (Adaptive and Embedded Computing Group) within AMD.

Xilinx

5 roles

Manager Software Development

Promoted

Jan 2018 – Feb 2022 · 4 yrs 1 mo

Part of leadership and development team of the Model Composer product.
Successfully conceived a new product idea, started from its conception to a successful productization
Managing System Generator for DSP product & its development team
Added support for AI Engines block library to the product
Leading the effort to unify System Generator for DSP and Model Composer tool as a single product
Managing a high performing team of 6 engineers

System Generator for DSPAI Engines block libraryTeam ManagementProduct DevelopmentSoftware DevelopmentProduct Management

Senior Software Engineer 2

Jul 2016 – Dec 2017 · 1 yr 5 mos

Managed the System Generator product transition from San Jose to the Hyderabad site
Responsible for the complete ownership of System Generator for DSP product
Mentor a team of 3 people in the development team and 2 people in the verification team.
Architected various features & solutions like multiple clock support, abstracted blocks for complex DSP functions, hybrid simulation, abstracted fixed-point data types, integration with third-party simulators, etc.

System Generator for DSPMentorshipFeature ArchitectureSoftware DevelopmentTeam Leadership

Senior Software Engineer 1

Promoted

Jul 2014 – Jun 2016 · 1 yr 11 mos

Leading the Vivado System Generator development team at Hyderabad site, Xilinx
Prototype various software solutions, productize them, and deliver it
Engaging top tier customers and application engineers
Working closely with the wider team including Marketing, DSV, Application, and documentation team to help to drive the overall product to the end-customer

Vivado System GeneratorPrototypingCustomer EngagementSoftware DevelopmentProduct Management

Software Engineer - 2

Promoted

Jul 2012 – Jun 2014 · 1 yr 11 mos

Develop & enhance infrastructure to simulate and implement DSP algorithms for actual realization in FPGA
Re-invent the System Generator tool for Vivado
Managed migration of the product source code from SVN repository to Perforce
Build cycle-true C++ models for various DSP and memory functions
Part of a globally distributed team

DSP AlgorithmsSimulation InfrastructureSource Code ManagementSoftware DevelopmentInfrastructure Development