Tanishq Janghela

Software Engineer

Jalandhar, Punjab, India2 yrs 3 mos experience

Key Highlights

  • Experienced DFT Engineer at Intel Corporation.
  • Strong foundation in VLSI design and digital logic.
  • Proficient in RTL design and JTAG methodologies.
Stackforce AI infers this person is a VLSI Design Engineer with expertise in digital IC design and DFT methodologies.

Contact

LinkedIn

Skills

Core Skills

DftDigital Ic DesignRtl Design

Other Skills

Digital DesignsBISTJoint Test Action Group (JTAG)Digital LogicVLSI CADIntel Quartus PrimeXilinx VivadoVerilogCTeamworkProblem SolvingMicrosoft PowerPointMicrosoft WordMicrosoft OfficeMicrosoft Excel

Experience

2 yrs 3 mos
Total Experience
1 yr 5 mos
Average Tenure
10 mos
Current Experience

Intel corporation

2 roles

DFT Engineer

Jun 2025 – Present · 10 mos

Digital DesignsBISTJoint Test Action Group (JTAG)Digital LogicRTL DesignDFT+7

Intern

Jun 2024 – May 2025 · 11 mos

RTL DesignJoint Test Action Group (JTAG)

Shri g s institute of technology & science

Placement Coordinator

Mar 2018 – Aug 2019 · 1 yr 5 mos

Education

Dr. B R Ambedkar National Institute of Technology, Jalandhar ( PUNJAB)

Master of Technology - MTech — VLSI design

Aug 2023 – Jul 2025

Shri G S Institute of Technology & Science

B tech. — electrical engineering

Jan 2017 – Jan 2021

San Thome Academy Dewas

12th PCM

Jan 2015 – Jan 2017

Jawahar Navodaya Vidyalaya - JNV

high school

Jan 2010 – Jan 2015

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