Basavalinga K — Engineering Manager

21 years of industry experience. More than 18 years of experience in FPGA Architecture design and Telecom System Testing and involved in all development stages of Hardware and Embedded Projects. Expertise in ASIC/FPGA Architecture design, RTL Coding (VHDL /Verilog). Timing Analysis and Place and Route. Telecom System testing, board bring-up and Architecture documentation. Specialties: Understanding of both Altera and Xilinx FPGA Architecture. High Speed Networking Protocols like Ethernet, DDR, PCIe, SGMII, Serdes and XAUI interface. Worked on complex Projects like RPR (IEEE 802.17)

Stackforce AI infers this person is a Telecommunications expert with extensive experience in FPGA and ASIC design.

Location: Bengaluru, Karnataka, India

Experience: 25 yrs 1 mo