Sonal Patil — Software Engineer
Experience in Portable Test and Stimulus Standard (PSS) based model development, Scenario development and Test bench automation. Experience in communication protocols (SPI, I2C, UART). Exploring SV verification methodology. Developed PSS verification models SPI, I2C, DMA, RTC, WDT, UART and generated system level scenarios.
Stackforce AI infers this person is a specialist in Embedded Systems with a focus on verification methodologies.
Location: Karnataka, India
Experience: 5 yrs
Skills
- Pss
- Sv Verification Methodology
Career Highlights
- Expert in Portable Stimulus Standard model development.
- Proficient in communication protocols like SPI and I2C.
- Skilled in developing verification models and scenarios.
Work Experience
AMD
Senior Silicon Design Engineer (7 mos)
Cadence Design Systems
Senior Application Engineer (1 yr 3 mos)
Vayavya Labs Pvt. Ltd.
Senior Engineer (9 mos)
Engineer (2 yrs 4 mos)
Verification Engineer (3 yrs 2 mos)
Education
Bachelor's degree at Visvesvaraya Technological University
Bachelor of Engineering - BE at Jain College of Engineering, BELGAUM
