Ayush Jindal

Software Engineer

Noida, Uttar Pradesh, India8 yrs 7 mos experience

Most Likely To SwitchHighly Stable

Key Highlights

Expert in C++ with extensive software development experience.
Proven track record in enhancing software features and performance.
Strong background in algorithms and data structures.

Stackforce AI infers this person is a Software Engineer specializing in C++ and software development for enterprise applications.

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Skills

Core Skills

Software DevelopmentC++

Other Skills

Visual StudioXcodeDistributed SystemsGitJavaBack-End Web DevelopmentAlgorithmsData StructuresProgrammingObject-Oriented Programming (OOP)Analytical SkillsProblem Solving

About

Experienced Software Engineer with a demonstrated history of working in the Software Development industry. Skilled in Algorithms, Data Structures, Object-Oriented Programming (OOP), and C++, Distributed Web Systems Designing, MySQL.

Experience

8 yrs 7 mos

Total Experience

2 yrs 1 mo

Average Tenure

4 yrs 11 mos

Current Experience

Adobe

Computer Scientist

May 2021 – Present · 4 yrs 11 mos · Noida, Uttar Pradesh, India · Hybrid

Working in Graphics and Printing domain.
Adding new features, solving customer bugs.
PDF Printing (Dec2023 to Jan2025):
Writing a new application-side printing pipeline for PDF Printing, for both Mac and Win. This would be shipped in Acrobat, Indesign and Illustrator.
As PDF printing is becoming the industry standard now, we are adding a new printing pipeline wherein we would apply the print options (almost all print options that you see in Acrobat are covered) provided by the user to the Artwork and create a modified PDF out of it and passthrough that PDF to the printer for printing.
This would reduce the printing time and also improve the quality of the print.

Visual StudioXcodeSoftware DevelopmentC++

Cadence design systems

Software Engineer 2

Jun 2020 – May 2021 · 11 mos · Noida, Uttar Pradesh, India

Worked in compiler dev for FPGA prototyping.
Made EditNetlist utility - This utility is used by the user in case he wants to edit the debug signals for FPGA prototyping after the compilation has been done. The compilation of large Verilog code takes hours to complete and thus it becomes a cumbersome task for the user to go through this process again in case he missed out a few debugging signals. So, we came up with an idea to implement this utility which accepts force/monitor signals as input from the user in the form of a text file and then edits the compiled Verilog code. This means editing a particular set of files for all the FPGAs and all the boards present. This required covering a large set of scenarios and corner cases.
This also required restructuring the existing code, taking out the common functions and putting them in a parent class etc.
Optimising the existing code using parallel process launching.
Worked on process IDs and stuff.
Everything was on LINUX.

Samsung r&d institute india - bangalore private limited

Senior Engineer

Jul 2019 – Jun 2020 · 11 mos · Bangalore

Worked in SATA SSD firmware development (C++) team in SSIR division. Studied the algorithms for Read and Write path and their derivatives in detail. This majorly included:
Buffer management for different cases like unaligned Bitmap etc. and DMA management in Read & Write commands.
Analysis of dumps using T32.

Wipro limited

Project Engineer

Sep 2017 – Jul 2019 · 1 yr 10 mos · Noida, Uttar Pradesh, India

AIC project:
Made web services in Python to perform calculations on Agricultural data to get various statisctical model and find out the Premium Insurance Rate. This included writing SQL queries to get the data from MYSQL DB, writing code to perform the calculations and saving the calculated data back to the DB.
Holmes:
Made a GUI app to take training data from the user and send it to the NLU for training.
Worked on Integrating the Holmes chatbot with Slack app.
Implemented chat dialogue for Holmes chatbot using rivescript.
Studied the basics of Classifiers.