Krishnaprasad Bindumadhavan

Lead ML Engineer

Bengaluru, Karnataka, India9 yrs 1 mo experience
Highly StableAI Enabled

Key Highlights

  • 8+ years in software development and compiler design.
  • Expertise in AI/ML compiler development.
  • Led significant projects optimizing deep learning models.
Stackforce AI infers this person is a specialist in AI/ML compiler technologies within the software development industry.

Contact

Skills

Core Skills

Artificial Intelligence (ai)Compilers

Other Skills

ONNXRTTVMONNXC++PythonMatlabPython (Programming Language)LLVMSignal ProcessingDeep LearningSystem VerilogFunctional Coverage

About

My expertise lies in cutting edge technologies in areas such as compiler design, optimization and code generation. I have 8+ years of software development experience with C++, Python, & MATLAB in the compiler space. GitHub: https://github.com/f2013519

Experience

9 yrs 1 mo
Total Experience
2 yrs 10 mos
Average Tenure
6 mos
Current Experience

Qualcomm

Senior Lead Engineer

Oct 2025Present · 6 mos · Hyderabad, Telangana, India · On-site

Marvell technology

2 roles

Senior Staff Engineer

Promoted

May 2024Oct 2025 · 1 yr 5 mos · Bengaluru, Karnataka, India

  • Leading a team focused on AI/ML compiler development. In addition to my technical contributions highlighted below, my role involves:
  • i) Collaborating with cross-functional teams to gather requirements and implement new features in the compiler
  • ii) Mentoring junior engineers & interns and providing technical guidance
  • iii) Tech Talks and community engagement to promote Marvell's AI solutions
ONNXRTArtificial Intelligence (AI)

Staff Engineer

Jun 2022May 2024 · 1 yr 11 mos · Bengaluru, Karnataka, India

  • Spearheaded development on an AI/ML compiler stack to optimize and deploy deep learning models for the Octeon 10 DPU.
  • Some of the areas where I have majorly contributed are:
  • i) Front end integration with the open source Apache TVM framework
  • ii) Implemented the hardware & simulator runtime
  • iii) Compiler optimizations to decrease memory footprint and improve performance for various low level ML operators (ex. convolution layer, pooling layers).
  • This work enabled many important models to fit on the hardware and boosted performance by up to 10-100% across an internal test suite / benchmark
  • iv) Developed a PTQ (post training quantization) framework to instrument and convert floating point models to a quantized 8-bit integer format
  • v) Support for the ONNX QDQ int8 format in the compiler
  • vi) Upstreamed several bug fixes to the Apache TVM project and ONNXRT
  • Tech Stack - TVM, ONNX, C++, Python
  • Press Release: https://www.marvell.com/company/newsroom/marvell-open-sources-octeon-10-ml-ai-accelerator-software-5g-ran.html
Artificial Intelligence (AI)CompilersTVMONNXC++Python

Mathworks

Software Engineer

Jun 2017May 2022 · 4 yrs 11 mos · Bengaluru, Karnataka, India

  • My group at MathWorks was the MATLAB Coder team.
  • The product is a source-to-source compiler which compiles MATLAB code to C/C++. I also worked closely with other code generation teams that target other languages like Verilog, VHDL, CUDA, and SystemC.
  • My past projects include adding support for half precision (16 bit floating point) datatype for code generation (C/C++/CUDA/LLVM) and simulation: https://www.mathworks.com/help/fixedpoint/ref/half.html
  • My most recent work at MathWorks focused on translation of MATLAB code to synthesizable SystemC code : https://www.mathworks.com/help/hdlcoder/systemc-code-generation-from-matlab.html
  • I developed the initial prototype and design and led the effort to deliver the first release of the MATLAB to SystemC workflow. I also worked with customers and partners to integrate their tools with the workflow.
MatlabC++Compilers

Nvidia

Student Intern

Aug 2016Dec 2016 · 4 mos · Bengaluru Area, India

  • Worked with the hardware verification team to develop tooling & scripts to collect testbench coverage of hardware modules in SystemVerilog.

Synopsys inc

Technical Intern

May 2016Jun 2016 · 1 mo · Greater Hyderabad Area

  • Worked on understanding standard cell library design for the 16nm FinFET process node.

Education

Birla Institute of Technology and Science, Pilani

Bachelor of Engineering (B.E.) — Electronics and Instrumentation

Jan 2013Jan 2017

Delhi Public School, Nacharam

High School — Math Physics Chemistry

Jan 2011Jan 2013

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