Chirra Varun — DevOps Engineer
Technology enthusiast with strong focus on Integrated circuit design. Area of Interest: Logic Synthesis, Physical Design, STA, Physical Verification. Work experience includes the usage of DC, Genus, ICCII, Innovus, PT, Tempus, virtuoso, Calibre (nmDRC &LVS ), Redhawk, Conformal, LTSpice, magic and TCL/Shell/Perl . As a Design Engineer worked on block level implementation from synthesis , floor planning to routing with timing and Drc sign off.(3nm, 4nm,5nm,14nm ,16nm, 28nm )
Stackforce AI infers this person is a Semiconductor Design Engineer with expertise in IC design and verification.
Location: Bengaluru, Karnataka, India
Experience: 7 yrs 9 mos
Career Highlights
- Expert in Integrated Circuit Design and Physical Verification.
- Proficient in advanced technologies like 3nm and 5nm processes.
- Strong background in Logic Synthesis and Static Timing Analysis.
Work Experience
Cadence Design Systems
Lead Engineer (2 yrs 10 mos)
PV Engineer II (2 yrs 1 mo)
MediaTek
Synthesis and STA Engineer (6 mos)
Ajna Innovations Private Limited
Physical Design Engineer (2 yrs)
Insemi Technology Services Pvt. Ltd.
Physical Design Trainee Engineer (1 mo)
Jagruthi Technosys Private Limited
Digital Design Trainee (5 mos)
TSSPDCL
Intern (4 mos)
Education
Master of Technology - MTech at Birla Institute of Technology and Science, Pilani
Bachelor of Technology at CVR College of Engineering, Hyderabad
BIE at Narayana Junior college
SSC at Tejaswi Concept School
