A

Abhishek Joshi

Director of Engineering

San Francisco, California, United States16 yrs 8 mos experience
AI ML PractitionerHighly Stable

Key Highlights

  • Proven track record in AI/ML compiler optimizations.
  • Expert in leading global engineering teams.
  • Innovative contributions to patented technologies.
Stackforce AI infers this person is a leader in AI/ML technology and compiler optimization.

Contact

Skills

Core Skills

Ai/ml Compiler OptimizationsSoftware DevelopmentLinear Programming & Optimizations

Other Skills

C++PythonGraph Algorithms & OptimizationsMulti-threadingParallel AlgorithmsApproximation AlgorithmsField-Programmable Gate Arrays (FPGA)Data AnalysisASICCEDAVLSIVerilog

About

Leadership - Experienced Engineering leader with a demonstrated history of working in the fast paced tech industry. Developed and implemented strategies to improve productivity and efficiency, resulting in time and cost savings. Passionate about developing and nurturing talent, fostering growth within individuals and teams. Strong track record of successfully leading teams to deliver. Management: Strong problem-solving and decision-making abilities, with a focus on achieving optimal outcomes. Demonstrated ability to adapt to changing environments and manage multiple priorities. Exceptional organizational and time management skills, ensuring efficient and effective operations. Successfully managing large global teams, fostering a high-performance culture and achieving key business targets. Technology - Passionate innovator with hands on contribution to several key initiatives such as a novel place & route tool for the AI Engine Compiler using linear optimizations (patented), Boolean satisfiability-based novel algorithm for routing leaf clocks on a dense graph (publication), and a novel mathematical-solver based tool for the Vivado Clocking solution (patented). Skilled in Data Structures, Algorithms, Linear Programming & Optimizations, Graph Theory Algorithms & Optimizations, C/C++, Python, Perl, and Software Development.

Experience

16 yrs 8 mos
Total Experience
5 yrs 2 mos
Average Tenure
1 yr 2 mos
Current Experience

Cerebras systems

Director of Engineering

Feb 2025Present · 1 yr 2 mos · San Francisco Bay Area · On-site

  • Developing and optimizing the Cerebras software stack that enables the efficient execution of advanced AI LLM workloads on the Cerebras Wafer-Scale Engine (WSE), world's largest chip designed specifically for deep learning! Driving the vision, architecture, and implementation of the compiler (MLIR-based) and related toolchains, ensuring our hardware is fully leveraged to deliver exceptional performance, scalability, and efficiency for machine learning models.
AI/ML Compiler OptimizationsC++PythonSoftware Development

Amd

Director of Software Engineering

Feb 2022Jan 2025 · 2 yrs 11 mos · San Francisco Bay Area · On-site

  • Leading a global (US & Europe) team working on AI/ML compiler backend optimizations for Versal AI Engine and a wide range of placement and routing algorithms for AMD FPGAs, including linear programming & optimization techniques, graph algorithms & optimizations, runtime optimizations using multi-threading and parallel algorithms.
AI/ML Compiler OptimizationsLinear Programming & OptimizationsGraph Algorithms & OptimizationsMulti-threadingParallel Algorithms

Xilinx

7 roles

Director of Software Engineering

Promoted

Dec 2021Feb 2022 · 2 mos · San Francisco Bay Area

Senior Software Engineering Manager

Nov 2018Nov 2021 · 3 yrs · San Francisco Bay Area

Senior Staff Software Engineer

Feb 2018Nov 2018 · 9 mos · San Francisco Bay Area

Staff Software Engineer

Promoted

Jul 2016Feb 2018 · 1 yr 7 mos · San Francisco Bay Area

Senior Software Engineer II

Jul 2014Jun 2016 · 1 yr 11 mos · San Francisco Bay Area

Senior Software Engineer I

Promoted

Jan 2013Jun 2014 · 1 yr 5 mos · San Francisco Bay Area

Software Engineer

Jan 2011Dec 2012 · 1 yr 11 mos · San Francisco Bay Area

Ittiam systems

Hardware Engineer

Jul 2007Jul 2009 · 2 yrs

  • Front-end RTL design and verification for ASIC and FPGA applications.

Education

University of Maryland

MS — Computer Engineering

Jan 2009Jan 2011

Indian Institute of Technology, Kanpur

B. Tech. — Electrical Engineering

Jan 2003Jan 2007

Stackforce found 100+ more professionals with Ai/ml Compiler Optimizations & Software Development

Explore similar profiles based on matching skills and experience